AMD AMD-K6-2/500AFX Data Sheet - Page 142
W/R# (Write/Read
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AMD-K6®-2 Processor Data Sheet Preliminary Information 21850J/0-February 2000 samples VCC2H/L# should design a weak pullup resistor for this signal. Table 19. Output Pin Float Conditions Name Floated At: Note VCC2DET Always Driven * VCC2H/L# Always Driven * Note: * All outputs except VCC2DET, VCC2H/L#, and TDO float during the Tri-State Test mode. 4.53 W/R# (Write/Read) Output Summary Driven and Floated The processor drives W/R# to indicate whether it is performing a write or a read cycle on the bus. In addition, W/R# is used to define other bus cycles, including interrupt acknowledge and special cycles. See Table 25 on page 126 for more details. W/R# is driven off the same clock edge as ADS# and remains in the same state until the clock edge on which NA# or the last expected BRDY# of the cycle is sampled asserted. W/R# is driven during memory cycles, I/O cycles, special bus cycles, and interrupt acknowledge cycles. W/R# is floated off the clock edge that BOFF# is sampled asserted and off the clock edge that the processor asserts HLDA in response to HOLD. 122 Signal Descriptions Chapter 4