AMD AMD-K6-2/500AFX Data Sheet - Page 271
Pin Connection Requirements, Power and Grounding, AMD-K6, 2 Processor Data Sheet
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21850J/0-February 2000 Preliminary Information AMD-K6®-2 Processor Data Sheet 13.3 Pin Connection Requirements For proper operation, the following requirements for signal pin connections must be met: s Do not drive address and data signals into large capacitive loads at high frequencies. If necessary, use buffer chips to drive large capacitive loads. s Leave all NC (no-connect) pins unconnected. s Unused inputs should always be connected to an appropriate signal level. • Active Low inputs that are not being used should be connected to VCC3 through a 20-kohm pullup resistor. • Active High inputs that are not being used should be connected to GND through a pulldown resistor. s Reserved signals can be treated in one of the following ways: • As no-connect (NC) pins, in which case these pins are left unconnected • As pins connected to the system logic as defined by the industry-standard Super7 and Socket 7 interface • Any combination of NC and Socket 7 pins s Keep trace lengths to a minimum. Chapter 13 Power and Grounding 251