AMD AMD-K6-2/500AFX Data Sheet - Page 25
Internal Architecture, 2.1 Introduction, 2.2 AMDK6®2 Processor Microarchitecture Overview, AMD-K6 - instruction set
View all AMD AMD-K6-2/500AFX manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 25 highlights
21850J/0-February 2000 Preliminary Information AMD-K6®-2 Processor Data Sheet 2 Internal Architecture 2.1 Introduction The AMD-K6-2 processor implements advanced design techniques known as the RISC86 microarchitecture. The RISC86 microarchitecture is a decoupled decode/execution design approach that yields superior sixth-generation performance for x86-based software. This chapter describes the techniques used and the functional elements of the RISC86 microarchitecture. 2.2 AMD-K6®-2 Processor Microarchitecture Overview When discussing processor design, it is important to understand the terms architecture, microarchitecture, and design implementation. The term architecture refers to the instruction set and features of a processor that are visible to software p rog ra m s r u n n ing o n t h e p ro c e s so r. The a rchi t ec t ure determines what software the processor can run. The a rch i t e c t u re o f t h e A M D -K 6 -2 p r o c e s s o r i s t h e industry-standard x86 instruction set. The term microarchitecture refers to the design techniques used in the processor to reach the target cost, performance, and functionality goals. The AMD-K6 family of processors are based on a sophisticated RISC core known as the Enhanced RISC86 microarchitecture. The Enhanced RISC86 microarchitecture is an advanced, second-order decoupled decode/execution design approach that enables industry-leading performance for x86-based software. The term design implementation refers to the actual logic and circuit designs from which the processor is created according to the microarchitecture specifications. Chapter 2 Internal Architecture 5