AMD AMD-K6-2/500AFX Data Sheet - Page 41
Software Environment, 3.1 Registers, Registers - specifications
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21850J/0-February 2000 Preliminary Information AMD-K6®-2 Processor Data Sheet 3 Software Environment This chapter provides a general overview of the AMD-K6-2 processor's x86 software environment and briefly describes the data types, registers, operating modes, interrupts, and instructions supported by the AMD-K6-2 architecture and design implementation. The stepping of the Model 8 determines the implementation and format of five Model-Specific Registers (MSRs). This document covers the following two stepping ranges of the AMD-K6-2 processor: s Model 8/[7:0] is any of eight possible model/steppings- Models 8/0, 8/1, 8/2, 8/3, 8/4, 8/5, 8/6, or 8/7. Model 8/[7:0] implements seven MSRs, and the bits and fields within these seven MSRs are defined identically. s Model 8/[F:8] is any of eight possible model/steppings- Models 8/8, 8/9, 8/A, 8/B, 8/C, 8/D, 8/E, or 8/F. Model 8/[F:8] implements the same seven MSRs as the Model 8/[7:0], but the bits and fields within two of these MSRs are not defined identically. Also, Model 8/[F:8] supports three additional MSRs for a total of ten MSRs. The name AMD-K6-2 processor by itself refers to all steppings of the Model 8. See "AMD-K6®-2 Processor Model 8/[F:8] Registers" on page 50 for the MSRs that are implemented only on the Model 8/[F:8]. 3.1 Registers The AMD-K6-2 processor contains all the registers defined by the x86 architecture, including general-purpose, segment, floating-point, MMX/3DNow!, EFLAGS, control, task, debug, test, and descriptor/memory-management registers. In addition, this chapter provides information on the AMD-K6-2 processor MSRs. Note: Areas of the register designated as Reserved should not be modified by software. Chapter 3 Software Environment 21