Intel BX80605I7870 Data Sheet - Page 96
Mc_rank_virtual_temp0, Mc_rank_virtual_temp1, Mc_rank_virtual_temp2, 13.10, Mc_ddr_therm_command0, - fan
UPC - 735858210461
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Register Description 2.13.9 MC_RANK_VIRTUAL_TEMP0 MC_RANK_VIRTUAL_TEMP1 MC_RANK_VIRTUAL_TEMP2 This register contains the 8 most significant bits [37:30] of the virtual temperature of each rank. The difference between the virtual temperature and the sensor temperature can be used to determine how fast fan speed should be increased. The value stored is right shifted one bit to the right with respect to the corresponding MC_Throttle_Offset register value. For example when When a rank throttle offset is set to 40h, the value read from the corresponding in MC_RANK_VIRTUAL_TEMP register is 20h. When there are more than 4 ranks attached to the channel, the thermal throttle logic is shared. Device: 4, 5, 6 Function: 3 Offset: 98h Access as a Dword Bit Type 31:24 RO 23:16 RO 15:8 RO 7:0 RO Reset Value Description 0 RANK3. Rank 3 virtual temperature. 0 RANK2. Rank 2 virtual temperature. 0 RANK1. Rank 1 virtual temperature. 0 RANK0. Rank 0 virtual temperature. 2.13.10 MC_DDR_THERM_COMMAND0 MC_DDR_THERM_COMMAND1 MC_DDR_THERM_COMMAND2 This register contains the command portion of the DDR_THERM# functionality as described in the processor datasheet (i.e., what an assertion of the pin does). Device: 4, 5, 6 Function: 3 Offset: 9Ch Access as a Dword Bit Type Reset Value Description THROTTLE. 3 RW 0 Force throttling when DDR_THERM# pin is asserted. 2 RW 0 Reserved DISABLE_EXTTS. 1 RW 0 Response to DDR_THERM# pin is disabled. ASSERTION and DEASSERTION fields in the register MC_DDR_THERM_STATUS are frozen. 0 RW 0 LOCK. When set, all bits in this register are RO and cannot be written. 96 Datasheet