Intel S1200BTL Product Specification - Page 106

Power Button

Page 106 highlights

Connector/Header Locations and Pin-outs Intel®Server Board S1200BT TPS Pin Signal Name Pin Signal Name 1 P3V3_AUX 2 3 NC 4 5 PWR_LED_N 6 7 P3V3 8 9 LED_HDD_ACT_N 10 11 FP_PWR_BTN_N 12 13 GND 14 15 FP_RST_BTN_N 16 17 GND 18 19 FP_ID_BTN_N 20 21 PU_FM_SIO_TEMP_SENSOR 22 23 FP_NMI_BTN_N 24 P3V3_AUX P5V_STBY TP_LED_ID_N LED_STS_GREEN_N LED_STS_AMBER_N LED_ NIC1_ACT LED_NIC1_LINK_N SMB_SEN_3V3SB_DAT SMB_SEN_3V3SB_CLK INTRUDER_HDR LED_ NIC2_ACT LED_ NIC2_LINK_N Combined system BIOS and the Integrated BMC support provide the functionality of the various supported control panel buttons and LEDs. The following sections describe the supported functionality of each control panel feature. Note: Control panel features are also routed through the bridge board connector at location J1C1 as is implemented in Intel® Server Systems configured using a bridge board and a hot- swap backplane. 7.4.1 Power Button The BIOS supports a front control panel power button. Pressing the power button initiates a request that the Integrated BMC forwards to the ACPI power state machines in the chipset. It is monitored by the Integrated BMC and does not directly control power on the power supply.  Power Button - Off to On The Integrated BMC monitors the power button and the wake-up event signals from the chipset. A transition from either source results in the Integrated BMC starting the powerup sequence. Since the processor are not executing, the BIOS does not participate in this sequence. The hardware receives the power good and reset signals from the Integrated BMC and then transitions to an ON state.  Power Button - On to Off (Operating system absent) The System Control Interrupt (SCI) is masked. The BIOS sets up the power button event to generate an SMI and checks the power button status bit in the ACPI hardware registers when an SMI occurs. If the status bit is set, the BIOS sets the ACPI power state of the machine in the chipset to the OFF state. The Integrated BMC monitors power state signals from the chipset and de-asserts PS_PWR_ON to the power supply. As a safety mechanism, if the BIOS fails to service the request, the Integrated BMC automatically powers off the system in 4 to 5 seconds.  Power Button - On to Off (Operating system present) If an ACPI operating system is running, pressing the power button switch generates a request using SCI to the operating system to shut down the system. The operating system retains control of the system and the operating system policy determines the sleep state into which the system transitions, if any. Otherwise, the BIOS turns off the system. 94 Revision 1.0 Intel order number G13326-003

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Connector/Header Locations and Pin-outs
Intel®
Server Board S1200BT TPS
Revision 1.0
Intel order number G13326-003
94
Pin
Signal Name
Pin
Signal Name
1
P3V3_AUX
2
P3V3_AUX
3
NC
4
P5V_STBY
5
PWR_LED_N
6
TP_LED_ID_N
7
P3V3
8
LED_STS_GREEN_N
9
LED_HDD_ACT_N
10
LED_STS_AMBER_N
11
FP_PWR_BTN_N
12
LED_ NIC1_ACT
13
GND
14
LED_NIC1_LINK_N
15
FP_RST_BTN_N
16
SMB_SEN_3V3SB_DAT
17
GND
18
SMB_SEN_3V3SB_CLK
19
FP_ID_BTN_N
20
INTRUDER_HDR
21
PU_FM_SIO_TEMP_SENSOR
22
LED_ NIC2_ACT
23
FP_NMI_BTN_N
24
LED_ NIC2_LINK_N
Combined system BIOS and the Integrated BMC support provide the functionality of the various
supported control panel buttons and LEDs. The following sections describe the supported
functionality of each control panel feature.
Note:
Control panel features are also routed through the bridge board connector at location
J1C1 as is implemented in Intel
®
Server Systems configured using a bridge board and a hot-
swap backplane.
7.4.1
Power Button
The BIOS supports a front control panel power button. Pressing the power button initiates a
request that the Integrated BMC forwards to the ACPI power state machines in the chipset. It is
monitored by the Integrated BMC and does not directly control power on the power supply.
Power Button
Off to On
The Integrated BMC monitors the power button and the wake-up event signals from the
chipset. A transition from either source results in the Integrated BMC starting the power-
up sequence. Since the processor are not executing, the BIOS does not participate in
this sequence. The hardware receives the power good and reset signals from the
Integrated BMC and then transitions to an ON state.
Power Button
On to Off (Operating system absent)
The System Control Interrupt (SCI) is masked. The BIOS sets up the power button
event to generate an SMI and checks the power button status bit in the ACPI hardware
registers when an SMI occurs. If the status bit is set, the BIOS sets the ACPI power
state of the machine in the chipset to the OFF state. The Integrated BMC monitors
power state signals from the chipset and de-asserts PS_PWR_ON to the power supply.
As a safety mechanism, if the BIOS fails to service the request, the Integrated BMC
automatically powers off the system in 4 to 5 seconds.
Power Button
On to Off (Operating system present)
If an ACPI operating system is running, pressing the power button switch generates a
request using SCI to the operating system to shut down the system. The operating
system retains control of the system and the operating system policy determines the
sleep state into which the system transitions, if any. Otherwise, the BIOS turns off
the system.