Intel S1200BTL Product Specification - Page 138

Contrib. To System - 1 battery

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Appendix B: Integrated BMC Sensor Tables Intel®Server Board S1200BT TPS Full Sensor Name (Sensor name in SDR) Sensor # Platform Applicability Sensor Type Event/Reading Type Event Offset Triggers Power Supply 2 Fan Tachometer 1 A4h (PS2 Fan Tach 1) Power Supply 2 Fan Tachometer 2 A5h (PS2 Fan Tach 2) Processor DIMM Aggregate Thermal Margin B0h (Mem P1 Thrm Mrgn) Processor DIMM Thermal Trip C0h (Mem P1 Thrm Trip) Baseboard +12V D0h (BB +12.0V) Baseboard +5V D1h (BB +5.0V) Baseboard +3.3V D2h (BB +3.3V) Baseboard +5V Stand-by D3h (BB +5.0V STBY) Baseboard +3.3V Auxiliary D4h (BB +3.3V AUX) Baseboard +1.2V Processor Vccp D6h (BB P1 Vccp) Baseboard +1.5V VDDQ D8h (BB +1.5V P1 MEM) Baseboard CMOS Battery DEh (BB +3.3V Vbat) Chassisspecific Chassisspecific All All All All All All All All All All Fan Threshold 04h 01h Fan Threshold 04h 01h Temperature Threshold 01h 01h - - [u,l] [c,nc] Temperature Digital Discrete 01h 03h Voltage 02h Threshold 01h Voltage 02h Threshold 01h Voltage 02h Threshold 01h Voltage 02h Threshold 01h 01 - State Asserted [u,l] [c,nc] [u,l] [c,nc] [u,l] [c,nc] [u,l] [c,nc] Voltage 02h Threshold 01h [u,l] [c,nc] Voltage 02h Threshold 01h [u,l] [c,nc] Voltage 02h Threshold 01h [u,l] [c,nc] Voltage 02h Threshold 01h [u,l] [c,nc] 126 Intel order number G13326-003 Contrib. To System Assert/De- Readable Event Status assert Data Value/Offsets - - Analog - - - nc = Degraded c = Non-fatal As and De Analog - Analog R, T Fatal As and De nc = Degraded As and c = Non-fatal De nc = Degraded As and c = Non-fatal De nc = Degraded c = Non-fatal nc = Degraded c = Non-fatal As and De As and De nc = Degraded As and c = Non-fatal De nc = Degraded As and c = Non-fatal De nc = Degraded As and c = Non-fatal De nc = Degraded As and c = Non-fatal De - Trig Offset Analog R, T Analog R, T Analog R, T Analog R, T Analog R, T Analog R, T Analog R, T Analog R, T Rearm Stand-by - - - - A - M X A - A - A - A X A X A - A - A - Revision 1.0

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Appendix B: Integrated BMC Sensor Tables
Intel®
Server Board S1200BT TPS
Revision 1.0
Intel order number G13326-003
126
Full Sensor Name
(Sensor name in SDR)
Sensor #
Platform
Applicability
Sensor Type
Event/Reading Type
Event Offset Triggers
Contrib. To System
Status
Assert/De-
assert
Readable
Value/Offsets
Event
Data
Rearm
Stand-by
Power Supply 2 Fan
Tachometer 1
(PS2 Fan Tach 1)
A4h
Chassis-
specific
Fan
04h
Threshold
01h
–
–
–
Analog
–
–
–
Power Supply 2 Fan
Tachometer 2
(PS2 Fan Tach 2)
A5h
Chassis-
specific
Fan
04h
Threshold
01h
–
–
–
Analog
–
–
–
Processor DIMM
Aggregate Thermal
Margin
(Mem P1 Thrm
Mrgn)
B0h
All
Temperature
01h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
–
Processor DIMM
Thermal Trip
(Mem P1 Thrm Trip)
C0h
All
Temperature
01h
Digital Discrete
03h
01
–
State Asserted
Fatal
As and
De
–
Trig
Offset
M
X
Baseboard +12V
(BB +12.0V)
D0h
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
–
Baseboard +5V
(BB +5.0V)
D1h
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
–
Baseboard +3.3V
(BB +3.3V)
D2h
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
–
Baseboard +5V
Stand-by
(BB +5.0V STBY)
D3h
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
X
Baseboard +3.3V
Auxiliary
(BB +3.3V AUX)
D4h
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
X
Baseboard +1.2V
Processor Vccp
(BB P1 Vccp)
D6h
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
–
Baseboard +1.5V
VDDQ
(BB +1.5V P1 MEM)
D8h
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
–
Baseboard CMOS
Battery
(BB +3.3V Vbat)
DEh
All
Voltage
02h
Threshold
01h
[u,l] [c,nc]
nc = Degraded
c = Non-fatal
As and
De
Analog
R, T
A
–