Intel S1200BTL Product Specification - Page 142

Appendix C: POST Code Diagnostic LED Decoder, Intel®, Server Board S1200BT TPS, Revision 1.0, Intel

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Appendix C: POST Code Diagnostic LED Decoder Intel®Server Board S1200BT TPS Progress Code 0x06 0x07 0x08 0x09 0x0E 0x0F 0x10 0x11 0x15 0x19 0x31 0x32 0x33 0x34 0x35 0x36 0x4F 0x60 0x61 0x62 0x63 0x68 0x69 0x6A 0x70 130 Diagnostic LED Decoder O = On, X=Off Upper Nibble Lower Nibble MSB 8h 4h 2h 1h 8h 4h 2h 1h LSB #7 #6 #5 #4 #3 #2 #1 #0 X X X X X O O X X X X X X X X X X O O O O X X X X X X X X X X X X X X X X X X O X X X O X X X O X X X O X X O O X X O O X X O O X X O O O X X O O O O X O O O O PEI Phase X X X X X X X O X O X O O X X O X X X O X X O X X X O O X O X X X X O O X O X O X X O O X O O X X O X X X O O X X O O X X O O X X O O X X O O X X O O X X O O X X O O O O O O O DXE Phase X X X X X X X O X X O X X X O O O X X X O X X O O X O X X X X X Description Early CPU initialization during Sec Phase Early South Bridge initialization Early North Bridge initialization End Of Sec Phase CPU Microcode Not Found. CPU Microcode Not Loaded. PEI Core Starts CPU PEI Module Starts North Bridge PEI Module Starts South Bridge PEI Module Starts Memory Installed CPU PEI Module for CPU initialization CPU PEI Module for Cache initialization CPU PEI Module for Boot Strap Processor Select CPU PEI Module for Application Processor initialization CPU PEI Module for CPU SMM initialization Dxe IPL started DXE Core started DXE NVRAM initialization SB RUN initialization Dxe CPU initialization DXE PCI Host Bridge initialization DXE NB initialization DXE NB SMM initialization DXE SB initialization Intel order number G13326-003 Revision 1.0

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Appendix C: POST Code Diagnostic LED Decoder
Intel®
Server Board S1200BT TPS
Revision 1.0
Intel order number G13326-003
130
Progress Code
Diagnostic LED Decoder
O = On, X=Off
Upper Nibble
Lower Nibble
MSB 8h 4h 2h 1h
8h 4h 2h 1h LSB
#7 #6 #5 #4
#3 #2 #1 #0
Description
0x06
X
X
X
X
X
O
O
X
Early CPU initialization during Sec
Phase
0x07
X
X
X
X
X
O
O
O
Early South Bridge initialization
0x08
X
X
X
X
O
X
X
X
Early North Bridge initialization
0x09
X
X
X
X
O
X
X
O
End Of Sec Phase
0x0E
X
X
X
X
O
O
O
X
CPU Microcode Not Found.
0x0F
X
X
X
X
O
O
O
O
CPU Microcode Not Loaded.
PEI Phase
0x10
X
X
X
O
X
X
X
X
PEI Core Starts
0x11
X
X
X
O
X
X
X
O
CPU PEI Module Starts
0x15
X
X
X
O
X
O
X
O
North Bridge PEI Module Starts
0x19
X
X
X
O
O
X
X
O
South Bridge PEI Module Starts
0x31
X
X
O
O
X
X
X
O
Memory Installed
0x32
X
X
O
O
X
X
O
X
CPU PEI Module for CPU initialization
0x33
X
X
O
O
X
X
O
O
CPU PEI Module for Cache initialization
0x34
X
X
O
O
X
O
X
X
CPU PEI Module for Boot Strap
Processor Select
0x35
X
X
O
O
X
O
X
O
CPU PEI Module for Application
Processor initialization
0x36
X
X
O
O
X
O
O
X
CPU PEI Module for CPU SMM
initialization
0x4F
X
O
X
X
O
O
O
O
Dxe IPL started
DXE Phase
0x60
X
O
O
X
X
X
X
X
DXE Core started
0x61
X
O
O
X
X
X
X
O
DXE NVRAM initialization
0x62
X
O
O
X
X
X
O
X
SB RUN initialization
0x63
X
O
O
X
X
X
O
O
Dxe CPU initialization
0x68
X
O
O
X
O
X
X
X
DXE PCI Host Bridge initialization
0x69
X
O
O
X
O
X
X
O
DXE NB initialization
0x6A
X
O
O
X
O
X
O
X
DXE NB SMM initialization
0x70
X
O
O
O
X
X
X
X
DXE SB initialization