Intel S1200BTL Product Specification - Page 42

Intel, I/O Acceleration Technolgy 2 Intel, I/OAT2, 10 Intel, Virtualization Technology for Directed - server mb

Page 42 highlights

Functional Architecture Intel®Server Board S1200BT TPS provides a standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASE-TX, and 10BASE-T applications (802.3, 802.3u, and 802.3ab). Lewisville also supports the Energy Efficient Ethernet (EEE) 802.az specification. The 82579 operates with the Platform Controller Hub (PCH) chipset that incorporates the MAC and interfaces with its integrated LAN controller through two interfaces: PCIebased and SMBus. The PCIe (main) interface is used for all link speeds when the system is in an active state (S0) while the SMBus is used only when the system is in a low power state (Sx). In SMBus mode, the link speed is reduced to 10 Mb/s (dependent on low power options). The PCIe interface incorporates two aspects: a PCIe SerDes (electrically) and a custom logic protocol. 3.8.3 MAC Address Definition Each Intel® Server Board S1200BTL has the following four MAC addresses assigned to it at the Intel® factory:  NIC 1 MAC address  NIC 2 MAC address - Assigned the NIC 1 MAC address +1  Integrated BMC LAN Channel MAC address - Assigned the NIC 1 MAC address +2  Intel® Remote Management Module 4 dedicated NIC MAC address - Assigned the NIC 1 MAC address +3 Each Intel® Server Board S1200BTS has the following two MAC addresses assigned to it at the Intel® factory:  NIC 1 MAC address  NIC 2 MAC address - Assigned the NIC 1 MAC address +1 3.9 Intel® I/O Acceleration Technolgy 2 (Intel® I/OAT2) Intel® I/O AT2 is not supported. 3.9.1 Direct Cache Access (DCA) Direct Cache Access (DCA) is not supported on Intel® Xeon® Processor E3-1200 Series. 3.10 Intel® Virtualization Technology for Directed I/O (Intel® VT-d) The Intel® C202 chipset provides hardware support for implementation of Intel® Virtualization Technology with Directed I/O (Intel® VT-d). Intel® VT-d Technology consists of technology components that support the virtualization of platforms based on Intel® Architecture Processors. Intel® VT-d technology enables multiple operating systems and applications to run in independent partitions. A partition behaves like a virtual machine (VM) and provides isolation and protection across partitions. Each partition is allocated its own subset of host physical memory. Note: If the setup options are changed to enable or disable the Virtualization Technology setting in the processor, the user must perform an AC power cycle for the changes to take effect. 30 Revision 1.0 Intel order number G13326-003

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153

Functional Architecture
Intel®
Server Board S1200BT TPS
Revision 1.0
Intel order number G13326-003
30
provides a standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASE-TX, and
10BASE-T applications (802.3, 802.3u, and 802.3ab). Lewisville also supports the Energy
Efficient Ethernet (EEE) 802.az specification.
The 82579 operates with the Platform Controller Hub (PCH) chipset that incorporates the MAC
and interfaces with its integrated LAN controller through two interfaces: PCIebased and SMBus.
The PCIe (main) interface is used for all link speeds when the system is in an active state (S0)
while the SMBus is used only when the system is in a low power state (Sx). In SMBus mode,
the link speed is reduced to 10 Mb/s (dependent on low power options). The PCIe interface
incorporates two aspects: a PCIe SerDes (electrically) and a custom logic protocol.
3.8.3
MAC Address Definition
Each Intel
®
Server Board S1200BTL has the following four MAC addresses assigned to it at the
Intel
®
factory:
NIC 1 MAC address
NIC 2 MAC address
Assigned the NIC 1 MAC address +1
Integrated BMC LAN Channel MAC address
Assigned the NIC 1 MAC address +2
Intel
®
Remote Management Module 4 dedicated NIC MAC address
Assigned the NIC
1 MAC address +3
Each Intel
®
Server Board S1200BTS has the following two MAC addresses assigned to it at the
Intel
®
factory:
NIC 1 MAC address
NIC 2 MAC address
Assigned the NIC 1 MAC address +1
3.9
Intel
®
I/O Acceleration Technolgy 2 (Intel
®
I/OAT2)
Intel
®
I/O AT2 is not supported.
3.9.1
Direct Cache Access (DCA)
Direct Cache Access (DCA) is not supported on Intel
®
Xeon
®
Processor E3-1200 Series.
3.10 Intel
®
Virtualization Technology for Directed I/O (Intel
®
VT-d)
The Intel
®
C202 chipset provides hardware support for implementation of Intel
®
Virtualization
Technology with Directed I/O (Intel
®
VT-d). Intel
®
VT-d Technology consists of technology
components that support the virtualization of platforms based on Intel
®
Architecture Processors.
Intel
®
VT-d technology enables multiple operating systems and applications to run in
independent partitions. A partition behaves like a virtual machine (VM) and provides isolation
and protection across partitions. Each partition is allocated its own subset of host
physical memory.
Note:
If the setup options are changed to enable or disable the Virtualization Technology
setting in the processor, the user must perform an AC power cycle for the changes to take
effect.