Intel S1200BTL Product Specification - Page 150

Glossary Term Hz I2C IA IBF ICH ICMB IERR IFB ILM IMC INTR I/OAT IOH IP IPMB IPMI IR ITP KB KCS KVM LAN LCD LDAP LED LPC LUN MAC MB MCH MD2 MD5 ME MMU ms MTTR Mux NIC NMI OBF OEM Ohm OVP 138 Definition Hertz (1 cycle/second) Inter-Integrated Circuit Bus Intel® Architecture Input Buffer I/O Controller Hub Intelligent Chassis Management Bus Internal Error I/O and Firmware Bridge Independent Loading Mechanism Integrated Memory Controller Interrupt I/O Acceleration Technology I/O Hub Internet Protocol Intelligent Platform Management Bus Intelligent Platform Management Interface Infrared In-Target Probe 1024 bytes Keyboard Controller Style Keyboard, Video, Mouse Local Area Network Liquid Crystal Display Local Directory Authentication Protocol Light Emitting Diode Low Pin Count Logical Unit Number Media Access Control 1024 KB Memory Controller Hub Message Digest 2 - Hashing Algorithm Message Digest 5 - Hashing Algorithm - Higher Security Management Engine Memory Management Unit Milliseconds Memory Type Range Register Multiplexor Network Interface Controller Non-maskable Interrupt Output Buffer Original Equipment Manufacturer Unit of electrical resistance Over-voltage Protection Intel order number G13326-003 Intel®Server Board S1200BT TPS Revision 1.0