Epson LQ 1050 Technical Manual - Page 188

CPU KPD781OHG, A-1. KPD7810/7811 Pin Diagram

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REV.-A A.1.l CPU KPD781OHG The wPD78 10/781 1 is an 8-bit CPU and includes two 8 bit timer counters, an 8-bit A/D converter, 256 bytes of RAM, and a serial interface. A system can be easily constructed using this IC. The main features of this IC are as follows. q 256 bytes built-in RAM (addresses FFOOH-FFFFH) q 4096 bytes maks ROM (addresses O-FFOOH) for the 7811 CPU q Direct addressing of up to 64K bytes . 8-bit A/D converter q 158 instructions q 0.8 KS instruction cycle (15 MHz) q 16-bit event counter q Two 8-bit timer counters q 3 external and 8 internal interrupts; 6 priority levels and 6 interrupt addresses. q General purpose serial interface (asynchronous, synchronous, and 1/0 modes) q 1/0 line (781 1 :40-bit 1/0 port; 78 10:24-bit edge detection, 4 inputs) L q Zero corss detection q Standby function q Built-in clock pulse circuit q NMOS Figures A-1 and A-2 illustrate the 78 10/781 1 HG microprocessor, and Tables A-3 through A-6 describe its functions. PAO PA 1 PA2 PA3 PA4 PAS PA6 PA7 PBO Pal P82 PB3 PB4 PBS PB6 P87 Pco Pcl PC2 PC3 P124 Pcs PC6 PC7 ml INT 1 MODE 1 RESET MOOEO x2 xl v Ss 5 ~6 - 7 - 8 ~9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 ~ 18 ~ -H - 21 - 22 - 23 - - :: ~ 26 :; % 29 36 30 31 X u 32 3 3 vu Voo PD7 P06 P05 P04 PD3 P02 Pol Poo PF7 PF6 PF5 PF4 PF3 PF2 PF 1 PFO ALE G m AVCC VAREF AN7 AN6 AN5 AN4 AN3 AN2 AN] ANO AV ss Figure A-1. KPD7810/7811 Pin Diagram A-2

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REV.-A
A.1.l
CPU KPD781OHG
The
wPD78
10/781 1 is an 8-bit CPU and includes two 8 bit timer counters, an 8-bit A/D converter, 256
bytes of RAM, and a serial interface. A system can be easily constructed using this
IC.
The main features
of this
IC
are as follows.
256 bytes built-in RAM (addresses FFOOH-FFFFH)
4096 bytes maks ROM (addresses
O-FFOOH)
for the 7811 CPU
Direct addressing of up to 64K bytes
. 8-bit A/D converter
158 instructions
0.8
KS
instruction cycle (15 MHz)
16-bit event counter
Two 8-bit timer counters
3 external and 8 internal interrupts; 6 priority levels and 6 interrupt addresses.
General purpose serial interface (asynchronous, synchronous, and
1/0
modes)
1/0
line (781 1 :40-bit
1/0
port; 78 10:24-bit edge detection, 4 inputs)
Zero corss detection
Standby function
Built-in clock pulse circuit
NMOS
Figures A-1 and A-2 illustrate the 78 10/781
1
HG microprocessor, and Tables A-3 through A-6 describe
its functions.
PAO
PA 1
PA2
PA3
PA4
PAS
PA6
PA7
PBO
Pal
P82
PB3
PB4
PBS
PB6
P87
Pco
Pcl
PC2
PC3
P124
Pcs
PC6
PC7
ml
INT
1
5
~
6
7
8
~
9
10
11
12
13
14
15
16
17
~
18
~
H
21
22
23
::
~
26
MODE 1
RESET
u
:;
%
MOOEO
29
36
x2
30
xl
31
X
v
Ss
32
33
vu
Voo
PD7
P06
P05
P04
PD3
P02
Pol
Poo
PF7
PF6
PF5
PF4
PF3
PF2
PF 1
PFO
ALE
G
m
AV
CC
VAREF
AN7
AN6
AN5
AN4
AN3
AN2
AN]
ANO
AV
ss
L
Figure A-1. KPD7810/7811 Pin Diagram
A-2