Intel S7000FC4UR Product Guide - Page 156

The system BIOS truncates 32-bit EFI POST Progress Codes to 8-bit values for display on the system board Diagnostic LED array. The resulting 8-bit POST code is displayed on the system board POST Code Diagnostic LED array at the start of each configuration process. This information can be used to assist with debugging system hangs during POST by identifying the last POST process initiated by the BIOS. Table 9. POST Progress Codes and Messages Progress Code Host Processor 0x10 0x11 0x12 0x13 Chipset 0x21 Memory 0xE1 0xE4 0xE6 0xEB 0x22 0x23 0x24 0x25 0x26 0x27 0x28 PCI Bus 0x50 0x51 0x52 0x53-0x57 USB Progress Code Meaning Power-on initialization of the host processor (Boot Strap Processor) Host processor cache initialization (including AP) Starting Application processor initialization SMM initialization Initializing a chipset component No memory available (system halted) BIOS cannot communicate with FBDIMM (serial channel hardware failure) FBDIMM(s) failed Memory iBIST or Memory Link Training failure FBDIMM with corrupted SPD data detected (system halted) Reading configuration data from memory (SPD on DIMM) Detecting presence of memory Programming timing parameters in the memory controller Configuring memory parameters in the memory controller Optimizing memory controller settings Initializing memory, such as ECC init Testing memory Enumerating PCI buses Allocating resources to PCI buses Hot Plug PCI controller initialization Reserved for PCI Bus 138 Intel® Server System S7000FC4UR Product Guide