3Com 3C63311 Reference Guide - Page 230

Mapping the DFA in the DXI Frame to the VPI/VCI

Get 3Com 3C63311 - SuperStack II PathBuilder S310 Bridge/router PDF manuals and user guides View all 3Com 3C63311 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 230 highlights

218 APPENDIX B: PATHBUILDER S330/S310 MODULE AND APPLICATION OVERVIEW DXI protocol frame is an HDLC LLC1 frame similar to PPP protocol. Mode 1A supports an AAL5 transit encapsulation. In terms of the Brouter, it is easier to implement DXI protocol, since it only requires the Brouter to encapsulate the SDU. DXI protocol supports up to 1023 connections and up to 9232 octets of payload. (See Figure 158 on the previous page.) Figure 159 shows the applications for DXI. Figure 159 DXI Applications V.35/RS-449/RS-530/X.21/RS-366 PathBuilder S330/S310 DXI Mode 1A PVC ATM PathBuilder S330/S310 ATM Native Host DXI Mode 1A When the PathBuilder S330/S310 receives a DXI Frame from the DXI DTE or an ATM CPCS protocol data unit (PDU) from the ATM network, it translates from frames into ATM CPCS PDUs or from ATM CPCS PDUs into frames by doing the following: n Mapping the DFA in the DXI frame to the VPI/VCI in the ATM cell header n Mapping the CLP in the DXI frame to the CLP in the ATM cell header n Mapping the CN in the DXI Frame to the PTI in the ATM cell header Mapping the DFA in the DXI Frame to the VPI/VCI in the ATM cell header In the DXI frame header, the DFA occupies 6 bits (bit 3 to bit 8) in the first octet and 4 bits (bit 6 to bit 8) in the second octet. The ATM DXI Specification defines a method for mapping between DFA and VPI/VCI. You can configure the PathBuilder S330/S310 by assigning the mapping values in certain way. See "Configuring Virtual Circuits" in Chapter 4, for details. Mapping the CLP in the DXI frame to the CLP in the ATM cell header When data is moved from DXI to ATM, the CLP bit in the DXI header is copied into the CLP field in the ATM cell header without change. When data is moved in the reverse direction, the CLP bit in the DXI header is always set 0, no matter what value it is in the ATM cell header. Mapping the CN in the DXI Frame to the PTI in the ATM cell header When data is moved from DXI to ATM, the CN bit is always set to 0 by the DTE. When data is moved in the reverse direction, the CN bit is set to 1 if PTI is 01x in the last ATM cell of the AAL5 CPCS PDU; otherwise, it is set to 0.

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • 155
  • 156
  • 157
  • 158
  • 159
  • 160
  • 161
  • 162
  • 163
  • 164
  • 165
  • 166
  • 167
  • 168
  • 169
  • 170
  • 171
  • 172
  • 173
  • 174
  • 175
  • 176
  • 177
  • 178
  • 179
  • 180
  • 181
  • 182
  • 183
  • 184
  • 185
  • 186
  • 187
  • 188
  • 189
  • 190
  • 191
  • 192
  • 193
  • 194
  • 195
  • 196
  • 197
  • 198
  • 199
  • 200
  • 201
  • 202
  • 203
  • 204
  • 205
  • 206
  • 207
  • 208
  • 209
  • 210
  • 211
  • 212
  • 213
  • 214
  • 215
  • 216
  • 217
  • 218
  • 219
  • 220
  • 221
  • 222
  • 223
  • 224
  • 225
  • 226
  • 227
  • 228
  • 229
  • 230
  • 231
  • 232
  • 233
  • 234
  • 235
  • 236
  • 237
  • 238
  • 239
  • 240
  • 241
  • 242
  • 243
  • 244
  • 245
  • 246
  • 247
  • 248
  • 249
  • 250
  • 251
  • 252
  • 253
  • 254
  • 255
  • 256
  • 257
  • 258
  • 259
  • 260
  • 261
  • 262
218
A
PPENDIX
B: P
ATH
B
UILDER
S330/S310 M
ODULE
AND
A
PPLICATION
O
VERVIEW
DXI protocol frame is an HDLC LLC1 frame similar to PPP protocol. Mode 1A
supports an AAL5 transit encapsulation. In terms of the Brouter, it is easier to
implement DXI protocol, since it only requires the Brouter to encapsulate the SDU.
DXI protocol supports up to 1023 connections and up to 9232 octets of payload.
(See Figure 158 on the previous page.)
Figure 159 shows the applications for DXI.
Figure 159
DXI Applications
When the PathBuilder S330/S310 receives a DXI Frame from the DXI DTE or an
ATM CPCS protocol data unit (PDU) from the ATM network, it translates from
frames into ATM CPCS PDUs or from ATM CPCS PDUs into frames by doing the
following:
n
Mapping the DFA in the DXI frame to the VPI/VCI in the ATM cell header
n
Mapping the CLP in the DXI frame to the CLP in the ATM cell header
n
Mapping the CN in the DXI Frame to the PTI in the ATM cell header
Mapping the DFA in the DXI Frame to the VPI/VCI
in the ATM cell header
In the DXI frame header, the DFA occupies 6 bits (bit 3 to bit 8) in the first octet
and 4 bits (bit 6 to bit 8) in the second octet. The ATM DXI Specification defines a
method for mapping between DFA and VPI/VCI. You can configure the PathBuilder
S330/S310 by assigning the mapping values in certain way. See “Configuring
Virtual Circuits” in Chapter 4, for details.
Mapping the CLP in the DXI frame to the CLP in the ATM cell header
When data is moved from DXI to ATM, the CLP bit in the DXI header is copied into
the CLP field in the ATM cell header without change. When data is moved in the
reverse direction, the CLP bit in the DXI header is always set 0, no matter what
value it is in the ATM cell header.
Mapping the CN in the DXI Frame to the PTI in the ATM cell header
When data is moved from DXI to ATM, the CN bit is always set to 0 by the DTE.
When data is moved in the reverse direction, the CN bit is set to 1 if PTI is 01x in
the last ATM cell of the AAL5 CPCS PDU; otherwise, it is set to 0.
PVC
DXI
Mode
1A
DXI
Mode
ATM
Native
Host
V.35/RS-449/RS-530/X.21/RS-366
ATM
PathBuilder S330/S310
PathBuilder S330/S310
1A