IBM 887022X Maintenance Manual - Page 83

Scalability, cabling

Page 83 highlights

Scalability cabling The verification checklist for the scalability ports is described in the following list. Note: The "Connected to" information is not known for ports that had been connected to the other server prior to booting as a standalone server for the diagnostic programs. 1. The "Connected to" column must be "unknown" for four ports, as shown. 2. The "Connected to" column must show that both "P3"s connect to each other. 3. The "Is Ready" just be "Yes" for all six ports. 4. The "Has Cable" must be "Yes" for all six ports. 5. The "Transmit" and "Receive" errors should both be "No" for all six ports. After performing these checks for one server in the configuration, perform the checks for the other server. The results must be identical. RXE cabling The cabling to an RXE100 Expansion Enclosure should be as follows: Primary Port A to Secondary Port A Primary Port B to RXE100 Side A Secondary Port B to RXE100 Side B These connections can be verified with the following display (from the diagnostic program main menu, select ″Hardware Info″ and ″Summit Chips″). The primary display in the following example begins with ″Memory″: This_______ Connectd_to Ext Is Has Port Trans Recei Error no Chip_._Port Chip_._Port Int Ready Cable Speed Error Error Count Memory: 07 Memory_1.P0 PCI-X__1.P0 Int yes yes 1000 MHz no no 00 08 Memory_1.P1 PCI-X__2.P0 Int yes yes 500 MHz no no 00 09 Memory_2.P0 PCI-X__2.P1 Int yes yes 500 MHz no no 00 10 Memory_2.PB RXE100_A.PA Ext yes yes 500 MHz no no 00 PCI-X: 11 PCI-X__1.P0 Memory_1.P0 Int yes yes 1000 MHz no no 00 12 PCI-X__1.PA Ext yes yes 250 MHz no no 00 13 PCI-X__2.P0 Memory_1.P1 Int yes yes 500 MHz no no 00 14 PCI-X__2.P1 Memory_2.P0 Int yes yes 500 MHz no no 00 RXE100: 15 RXE100_A.PA Memory_2.PB Ext yes yes 500 MHz no no 00 16 RXE100_A.P1 Int yes yes 250 MHz no no 00 In line number 12, Port A is shown as ″Ready″, but the ″Connected_to″ is unknown. In line number 10, Port B is shown as ″Connected_to″ RXE100 Side A, Port A. In line number 16, Port 1 is the internal port connecting to Side B, and it is ″Ready″. Chapter 3. Diagnostics 73

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Scalability
cabling
The
verification
checklist
for
the
scalability
ports
is
described
in
the
following
list.
Note:
The
“Connected
to”
information
is
not
known
for
ports
that
had
been
connected
to
the
other
server
prior
to
booting
as
a
standalone
server
for
the
diagnostic
programs.
1.
The
“Connected
to”
column
must
be
“unknown”
for
four
ports,
as
shown.
2.
The
“Connected
to”
column
must
show
that
both
“P3”s
connect
to
each
other.
3.
The
“Is
Ready”
just
be
“Yes”
for
all
six
ports.
4.
The
“Has
Cable”
must
be
“Yes”
for
all
six
ports.
5.
The
“Transmit”
and
“Receive”
errors
should
both
be
“No”
for
all
six
ports.
After
performing
these
checks
for
one
server
in
the
configuration,
perform
the
checks
for
the
other
server.
The
results
must
be
identical.
RXE
cabling
The
cabling
to
an
RXE100
Expansion
Enclosure
should
be
as
follows:
Primary
Port
A
to
Secondary
Port
A
Primary
Port
B
to
RXE100
Side
A
Secondary
Port
B
to
RXE100
Side
B
These
connections
can
be
verified
with
the
following
display
(from
the
diagnostic
program
main
menu,
select
Hardware
Info
and
Summit
Chips
).
The
primary
display
in
the
following
example
begins
with
Memory
:
=================================================================================
This_______
Connectd_to
Ext
Is
Has
Port
Trans
Recei
Error
no
Chip_._Port
Chip_._Port
Int
Ready
Cable
Speed
Error
Error
Count
--
-----------
-----------
---
-----
-----
-----
-----
-----
-----
Memory:
07
Memory_1.P0
PCI-X__1.P0
Int
yes
yes
1000
MHz
no
no
00
08
Memory_1.P1
PCI-X__2.P0
Int
yes
yes
500
MHz
no
no
00
09
Memory_2.P0
PCI-X__2.P1
Int
yes
yes
500
MHz
no
no
00
10
Memory_2.PB
RXE100_A.PA
Ext
yes
yes
500
MHz
no
no
00
PCI-X:
11
PCI-X__1.P0
Memory_1.P0
Int
yes
yes
1000
MHz
no
no
00
12
PCI-X__1.PA
...........
Ext
yes
yes
250
MHz
no
no
00
13
PCI-X__2.P0
Memory_1.P1
Int
yes
yes
500
MHz
no
no
00
14
PCI-X__2.P1
Memory_2.P0
Int
yes
yes
500
MHz
no
no
00
RXE100:
15
RXE100_A.PA
Memory_2.PB
Ext
yes
yes
500
MHz
no
no
00
16
RXE100_A.P1
...........
Int
yes
yes
250
MHz
no
no
00
================================================================================
In
line
number
12,
Port
A
is
shown
as
Ready
,
but
the
Connected_to
is
unknown.
In
line
number
10,
Port
B
is
shown
as
Connected_to
RXE100
Side
A,
Port
A.
In
line
number
16,
Port
1
is
the
internal
port
connecting
to
Side
B,
and
it
is
Ready
.
Chapter
3.
Diagnostics
73