AMD AMD-K6-2/500AFX Data Sheet - Page 237
SMM Base Address, 10.6 Halt Restart Slot, Table 44., SMM Revision Identifier
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21850J/0-February 2000 Preliminary Information AMD-K6®-2 Processor Data Sheet Table 44 shows the format of the SMM Revision Identifier. Table 44. SMM Revision Identifier 31-18 Reserved 0 17 SMM Base Relocation 1 16 I/O Trap Extension 1 15-0 SMM Revision Level 0002h 10.5 10.6 SMM Base Address During RESET, the processor sets the base address of the code-segment (CS) for the SMM memory area-the SMM base address-to its default, 0003_0000h. The SMM base address at offset FEF8h in the SMM state-save area can be changed by the SMM service routine to any address that is aligned to a 32-Kbyte boundary. (Locations not aligned to a 32-Kbyte boundary cause the processor to enter the Shutdown state when executing the RSM instruction.) In some operating environments it may be desirable to relocate the 64-Kbyte SMM memory area to a high memory area in order to provide more low memory for legacy software. During system initialization, the base of the 64-Kbyte SMM memory area is relocated by the BIOS. To relocate the SMM base address, the system enters the SMM handler at the default address. This handler changes the SMM base address location in the SMM state-save area, copies the SMM handler to the new location, and exits SMM. The next time SMM is entered, the processor saves its state at the new base address. This new address is used for every SMM entry until the SMM base address in the SMM state-save area is changed or a hardware reset occurs. Halt Restart Slot During entry into SMM, the halt restart slot at offset FF02h in the SMM state-save area indicates if SMM was entered from the Halt state. Before returning from SMM, the halt restart slot (offset FF02h) can be written to by the SMM service routine to specify whether the return from SMM takes the processor back to the Halt state or to the next instruction after the HLT instruction. Chapter 10 System Management Mode (SMM) 217