AMD AMD-K6-2/500AFX Data Sheet - Page 57
ModelSpecific Registers (MSR), AMD K86™ Family BIOS and Software Tools, Development Guide - info
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21850J/0-February 2000 Preliminary Information AMD-K6®-2 Processor Data Sheet Model-Specific Registers (MSR) 63 The AMD-K6-2 processor Model 8/[7:0] provides seven MSRs. The value in the ECX register selects the MSR to be addressed by the RDMSR and WRMSR instructions. The values in EAX and EDX are used as inputs and outputs by the RDMSR and WRMSR instructio ns . Table 5 lists the MSRs and the corresponding value of the ECX register. Figures 30 through 36 show the MSR formats. Table 5. AMD-K6®-2 Processor Model 8/[7:0] MSRs Model-Specific Register Value of ECX Machine Check Address Register (MCAR) 00h Machine Check Type Register (MCTR) 01h Test Register 12 (TR12) 0Eh Time Stamp Counter (TSC) 10h Extended Feature Enable Register (EFER) C000_0080h SYSCALL/SYSRET Target Address Register (STAR) C000_0081h Write Handling Control Register (WHCR) C000_0082h For more information about the RDMSR and WRMSR instructions, see the AMD K86™ Family BIOS and Software Tools Development Guide, order# 21062. MCAR and MCTR. The AMD-K6-2 processor does not support the generation of a machine check exception. However, the processor does provide a 64-bit machine check address register (MCAR), a 64-bit machine check type register (MCTR), and a machine check enable (MCE) bit in CR4. Because the processor does not support machine check exceptions, the contents of the MCAR and MCTR are only affected by the WRMSR instruction and by RESET being sampled asserted (where all bits in each register are reset to 0). 0 MCAR Figure 30. Machine-Check Address Register (MCAR) Chapter 3 Software Environment 37
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