AMD AMD-K6-2/500AFX Data Sheet - Page 77
Instruction Mnemonic, First, Second, ModR/M, Decode, RISC86, Operations, BT mem16/32, imm8
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21850J/0-February 2000 Preliminary Information AMD-K6®-2 Processor Data Sheet Table 14. Integer Instructions (continued) Instruction Mnemonic AND mreg8, imm8 AND mem8, imm8 AND mreg16/32, imm16/32 AND mem16/32, imm16/32 AND mreg16/32, imm8 (signed ext.) AND mem16/32, imm8 (signed ext.) ARPL mreg16, reg16 ARPL mem16, reg16 BOUND BSF reg16/32, mreg16/32 BSF reg16/32, mem16/32 BSR reg16/32, mreg16/32 BSR reg16/32, mem16/32 BSWAP EAX BSWAP ECX BSWAP EDX BSWAP EBX BSWAP ESP BSWAP EBP BSWAP ESI BSWAP EDI BT mreg16/32, reg16/32 BT mem16/32, reg16/32 BT mreg16/32, imm8 BT mem16/32, imm8 BTC mreg16/32, reg16/32 BTC mem16/32, reg16/32 BTC mreg16/32, imm8 BTC mem16/32, imm8 BTR mreg16/32, reg16/32 BTR mem16/32, reg16/32 BTR mreg16/32, imm8 BTR mem16/32, imm8 First Second Byte Byte ModR/M Decode Byte Type RISC86 Operations 80h 11-100-xxx short alux 80h mm-100-xxx long load, alux, store 81h 11-100-xxx short alu 81h mm-100-xxx long load, alu, store 83h 11-100-xxx short alux 83h mm-100-xxx long load, alux, store 63h 11-xxx-xxx vector 63h mm-xxx-xxx vector 62h vector 0Fh BCh 11-xxx-xxx vector 0Fh BCh mm-xxx-xxx vector 0Fh BDh 11-xxx-xxx vector 0Fh BDh mm-xxx-xxx vector 0Fh C8h long alu 0Fh C9h long alu 0Fh CAh long alu 0Fh CBh long alu 0Fh CCh long alu 0Fh CDh long alu 0Fh CEh long alu 0Fh CFh long alu 0Fh A3h 11-xxx-xxx vector 0Fh A3h mm-xxx-xxx vector 0Fh BAh 11-100-xxx vector 0Fh BAh mm-100-xxx vector 0Fh BBh 11-xxx-xxx vector 0Fh BBh mm-xxx-xxx vector 0Fh BAh 11-111-xxx vector 0Fh BAh mm-111-xxx vector 0Fh B3h 11-xxx-xxx vector 0Fh B3h mm-xxx-xxx vector 0Fh BAh 11-110-xxx vector 0Fh BAh mm-110-xxx vector Chapter 3 Software Environment 57