AMD AMD-K6-2/500AFX Data Sheet - Page 74
Instructions Supported by the AMDK6®2 Processor, MMX/3DNow! register
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AMD-K6®-2 Processor Data Sheet Preliminary Information 21850J/0-February 2000 3.3 Instructions Supported by the AMD-K6®-2 Processor This section documents all of the x86 instructions supported by the AMD-K6-2 processor. The following tables show the instruction mnemonic, opcode, modR/M byte, decode type, and RISC86 operation(s) for each instruction. Tables 14 through 17 define t he integer, floating-point, MMX, and 3DNow! instructions for the AMD-K6-2 processor, respectively. The first column in these tables indicates the instruction mnemonic and operand types with the following notations: s reg8-byte integer register defined by instruction byte(s) or bits 5, 4, and 3 of the modR/M byte s mreg8-byte integer register or byte integer value in memory defined by the modR/M byte s reg16/32-word or doubleword integer register defined by instruction byte(s) or bits 5, 4, and 3 of the modR/M byte s mreg16/32-word or doubleword integer register, or word or doubleword integer value in memory defined by the modR/M byte s mem8-byte integer value in memory s mem16/32-word or doubleword integer value in memory s mem32/48-doubleword or 48-bit integer value in memory s mem48-48-bit integer value in memory s mem64-64-bit value in memory s imm8-8-bit immediate value s imm16/32-16-bit or 32-bit immediate value s disp8-8-bit displacement value s disp16/32-16-bit or 32-bit displacement value s disp32/48-doubleword or 48-bit displacement value s eXX-register width depending on the operand size s mem32real-32-bit floating-point value in memory s mem64real-64-bit floating-point value in memory s mem80real-80-bit floating-point value in memory s mmreg-MMX/3DNow! register s mmreg1-MMX/3DNow! register defined by bits 5, 4, and 3 of the modR/M byte s mmreg2-MMX/3DNow! register defined by bits 2, 1, and 0 of the modR/M byte 54 Software Environment Chapter 3
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