Intel BFCBASE Data Sheet - Page 13

Document Number: 318080-002

13

Introduction

1.2

State of Data

This document contains preliminary information on new products in production. The

specifications are subject to change without notice. Verify with your local Intel sales

office that you have the latest datasheet before finalizing a design

1.3

References

Material and concepts available in the following documents may be beneficial when

reading this document:

Notes:

1.

Document is available publicly at

http://developer.intel.com

.

2.

Document available on

www.ssiforum.org

.

§

Document

Document

Number

1

Notes

AP-485, Intel

®

Processor Identification and the CPUID Instruction

241618

1

Intel

®

64 and IA-32 Architectures Software Developer's Manual

•

Volume 1: Basic Architecture

•

Volume 2A: Instruction Set Reference, A-M

•

Volume 2B: Instruction Set Reference, N-Z

•

Volume 3A: System Programming Guide Part 1

•

Volume 3B: System Programming Guide, Part 2

253665

253666

253667

253668

253669

1

IA-32 Intel

®

Architecture and Intel

®

64 Software Developer's Manual

Documentation Changes

252046

1

IA-32 Intel

®

Architecture Optimization Reference Manual

248966

1

Intel

®

Extended Memory 64 Technology

•

Volume I

•

Volume 2

300834

300835

1

Intel

®

Virtualization Technology for IA-32 Processors (VT-x) Preliminary

Specification

C97063

1

Dual-Core Intel® Xeon® Processor 7200 Series and Quad-Core Intel® Xeon®

Processor 7300 Series Specification Update

318081

1

Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD)

11.0 Design Guidelines

315889

1

EPS12V Power Supply Design Guide: A Server system Infrastructure (SSI)

Specification for Entry Chassis Power Supplies

2

Dual-Core Intel® Xeon® Processor 7200 Series and Quad-Core Intel® Xeon®

Processor 7300 Series Thermal / Mechanical Design Guide

318086

1

Intel

®

Xeon

®

Processor 7200 Series and 7300 Series Package Mechanical Models

1

mPGA604 Socket Design Guide

254239

1

Intel

®

Xeon

®

Processor 7200 Series and 7300 Series Enabled Components (CEK)

Thermal Models

1

Intel

®

Xeon

®

Processor 7200 Series and 7300 Series Enabled Components (CEK)

Mechanical Models

1

Intel

®

Xeon

®

Processor 7200 Series and 7300 Series Boundary Scan Descriptive

Language (BSDL) Model

1

Section	Page
1 Introduction	9
1.1 Terminology	11
1.2 State of Data	13
1.3 References	13
2 Electrical Specifications	15
2.1 Front Side Bus and GTLREF	15
2.2 Decoupling Guidelines	15
2.2.1 VCC Decoupling	16
2.2.2 VTT Decoupling	16
2.2.3 Front Side Bus AGTL+ Decoupling	16
2.3 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking	16
2.3.1 Front Side Bus Frequency Select Signals (BSEL[2:0])	17
2.3.2 PLL Power Supply	17
2.4 Voltage Identification (VID)	17
2.5 Reserved, Unused, or Test Signals	20
2.6 Front Side Bus Signal Groups	20
2.7 CMOS Asynchronous and Open Drain Asynchronous Signals	22
2.8 Test Access Port (TAP) Connection	22
2.9 Mixing Processors	23
2.10 Absolute Maximum and Minimum Ratings	23
2.11 Processor DC Specifications	24
2.11.1 Flexible Motherboard Guidelines (FMB)	25
2.11.2 Platform Environmental Control Interface (PECI) DC Specifications	35
2.11.3 VCC Overshoot Specification	37
2.11.4 AGTL+ FSB Specifications	38
2.12 Front Side Bus AC Specifications	40
2.13 Processor AC Timing Waveforms	45
3 Mechanical Specifications	57
3.1 Package Mechanical Drawing	57
3.2 Processor Component Keepout Zones	60
3.3 Package Loading Specifications	66
3.4 Package Handling Guidelines	67
3.5 Package Insertion Specifications	67
3.6 Processor Mass Specifications	67
3.7 Processor Materials	67
3.8 Processor Markings	68
3.9 Processor Pin-Out Coordinates	69
4 Pin Listing	71
4.1 Pin Assignments	71
4.1.1 Pin Listing by Pin Name	71
4.1.2 Pin Listing by Pin Number	79
5 Signal Definitions	87
5.1 Signal Definitions.	87
6 Thermal Specifications	95
6.1 Package Thermal Specifications	95
6.1.1 Thermal Specifications	95
6.1.2 Thermal Metrology	102
6.2 Processor Thermal Features	103
6.2.1 Thermal Monitor Features	103
6.2.2 Thermal Monitor	103
6.2.3 Thermal Monitor 2	104
6.2.4 On-Demand Mode	105
6.2.5 PROCHOT# Signal	106
6.2.6 FORCEPR# Signal	106
6.2.7 THERMTRIP# Signal	106
6.3 Platform Environment Control Interface (PECI)	107
6.3.1 Introduction	107
6.3.2 PECI Specifications	108
7 Features	111
7.1 Power-On Configuration Options	111
7.2 Clock Control and Low Power States	111
7.2.1 Normal State	112
7.2.2 HALT or Extended HALT State	112
7.2.3 Stop-Grant State	114
7.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant Snoop State	115
7.3 Enhanced Intel SpeedStep® Technology	115
7.4 System Management Bus (SMBus) Interface	116
7.4.1 SMBus Device Addressing	117
7.4.2 PIROM and Scratch EEPROM Supported SMBus Transactions	118
7.4.3 Processor Information ROM (PIROM)	119
7.4.4 Checksums	137
7.4.5 Scratch EEPROM	137
8 Boxed Processor Specifications	139
8.1 Introduction	139
8.2 Thermal Specifications	139
8.2.1 Boxed Processor Cooling Requirements	139
9 Debug Tools Specifications	141
9.1 Debug Port System Requirements	141
9.2 Logic Analyzer Interface (LAI)	141
9.2.1 Mechanical Considerations	141

Intel BFCBASE Data Sheet - Page 13

State of Data, 1.3 References

Page 13 highlights