Intel BFCBASE Data Sheet - Page 33
Notes, Static and Transient Tolerance
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Electrical Specifications Figure 2-7. Quad-Core Intel® Xeon® L7345 Processor VCC Static and Transient Tolerance Load Lines 0 VID - 0.000 Icc [A] 5 10 15 20 25 30 35 40 45 50 55 60 VID - 0.010 VID - 0.020 VCC Maxim um VID - 0.030 VID - 0.040 Vcc [V] VID - 0.050 VID - 0.060 VID - 0.070 VID - 0.080 VCC Typical VID - 0.090 VID - 0.100 VCC Minim um Notes: 1. The VCC_MIN and VCC_MAX loadlines represent static and transient limits. Please see Section 2.11.3 for VCC overshoot specifications. 2. Refer to Table 2-9 for processor VID information. 3. Refer to Table 2-10 for VCCStatic and Transient Tolerance 4. The load lines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE pins and the VCC_SENSE2 and VSS_SENSE2 pins. Voltage regulation feedback for voltage regulator circuits must also be taken from processor VCC_SENSE2 and VSS_SENSE2 pins. Refer to the Voltage Regulator Module (VRM) and Enterprise Voltage Regulator Down (EVRD) 11.0 Design Guidelines for socket load line guidelines and VR implementation. Please refer to the appropriate platform design guide for details on VR implementation Document Number: 318080-002 33