Intel BFCBASE Data Sheet - Page 48
BCLK Waveform at Processor Pad and Pin
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Figure 2-15. BCLK Waveform at Processor Pad and Pin Electrical Specifications Notes: 1. Waveform at pin is non-monotonic. Waveform at pad is monotonic. 2. Differential Edge Rate (DER) measured zero +/- 200mv. 3. g indicates V/ns units and meg indicates mv/ns units. 4. Waveform at pad has faster edge rate than at pin. Figure 2-16. FSB Common Clock Valid Delay Timing Waveform T0 T1 T2 BCLK1 BCLK0 Common Clock Signal (@ driver) Common Clock Signal (@ receiver) TP valid valid TQ TR valid TP = T10: Common Clock Output Valid Delay TQ = T11: Common Clock Input Setup TR = T12: Common Clock Input Hold Time 48 Document Number: 318080-002
Electrical Specifications
48
Document Number: 318080-002
Notes:
1.
Waveform at pin is non-monotonic. Waveform at pad is monotonic.
2.
Differential Edge Rate (DER) measured zero +/- 200mv.
3.
g indicates V/ns units and meg indicates mv/ns units.
4.
Waveform at pad has faster edge rate than at pin.
Figure 2-15. BCLK Waveform at Processor Pad and Pin
Figure 2-16. FSB Common Clock Valid Delay Timing Waveform
BCLK0
BCLK1
Common Clock
Signal (@ driver)
Common Clock
Signal (@ receiver)
T0
T1
T2
T
Q
T
R
valid
valid
valid
T
P
T
P
= T10: Common Clock Output Valid Delay
T
Q
= T11: Common Clock Input Setup
T
R
= T12: Common Clock Input Hold Time