Intel BFCBASE Data Sheet - Page 35
Platform Environmental Control Interface (PECI) DC Specifications
UPC - 735858197373
View all Intel BFCBASE manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 35 highlights
Electrical Specifications Table 2-12. CMOS Signal Input/Output Group DC Specifications Symbol VIL VIH VOL VOH IOL IOH ILI Parameter Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Low Current Output High Current Input Leakage Current Min -0.10 0.7*VTT -0.10 0.9*VTT 1.70 1.70 N/A Typ 0.00 VTT 0 VTT N/A N/A N/A Max 0.3*VTT VTT+0.1 0.1*VTT VTT+0.1 4.70 4.70 +/- 100 Units V V V V mA mA μA Notes: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. The VTT referred to in these specifications refers to instantaneous VTT. 3. Refer to the processor I/O Buffer Models for I/V characteristics. 4. Measured at 0.1*VTT. 5. Measured at 0.9*VTT. 6. For Vin between 0 V and VTT. Measured when the driver is tristated. 7. This is the measurement at the pin. Notes1 2,3 2 2 2 4 5 6,7 Table 2-13. Open Drain Signal Group DC Specifications Symbol VOL VOH IOL ILO Parameter Output Low Voltage Output High Voltage Output Low Current Leakage Current Min VTT -5% 16 N/A Typ N/A VTT N/A N/A Max 0.20 VTT +5% 50 +/- 200 Units V V mA μA Notes1 3 2 4,5 Notes: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. Measured at 0.2*VTT. 3. VOH is determined by value of the external pullup resistor to VTT. Please refer to platform design guide for details. 4. For VIN between 0 V and VOH. 5. This is the measurement at the pin. Table 2-14. SMBus Signal Group DC Specifications Symbol Parameter Min Max Unit Notes 1, 2 VIL Input Low Voltage -0.30 0.30 * SM_VCC V VIH Input High Voltage 0.70 * SM_VCC 3.465 V VOL Output Low Voltage 0 0.400 V IOL Output Low Current N/A ILI Input Leakage Current N/A ILO Output Leakage Current N/A 3.0 mA ± 10 µA ± 10 µA CSMB SMBus Pin Capacitance 15.0 pF 3 Notes: 1. These parameters are based on design characterization and are not tested. 2. All DC specifications for the SMBus signal group are measured at the processor pins. 3. Platform designers may need this value to calculate the maximum loading of the SMBus and to determine maximum rise and fall times for SMBus signals. 2.11.2 Platform Environmental Control Interface (PECI) DC Specifications PECI is an Intel proprietary one-wire bus interface that provides a communication channel between Intel processor and external thermal monitoring devices. The DualCore Intel® Xeon® Processor 7200 Series and Quad-Core Intel® Xeon® Processor Document Number: 318080-002 35