Intel BFCBASE Data Sheet - Page 96

Thermal Specifications

96

Document Number: 318080-002

Additionally, utilization of a thermal solution that does not meet the Thermal Profile will

violate the thermal specifications and may result in permanent damage to the

processor. Refer to the

Dual-Core Intel® Xeon® Processor 7200 Series

and Quad-

Core Intel® Xeon® Processor 7300 Series Thermal / Mechanical Design Guide

for

details on system thermal solution design, thermal profiles and environmental

considerations.

For the Quad-Core Intel® Xeon® X7350 Processor, Intel has developed a thermal

profile which must be met to ensure adherence to Intel reliability requirements. The

Thermal Profile (see

Figure 6-2

;

Table 6-4

) is representative of a volumetrically

unconstrained thermal solution (that is, industry enabled 2U heatsink). In this scenario,

it is expected that the Thermal Control Circuit (TCC) would only be activated for very

brief periods of time when running the most power intensive applications. Intel has

developed the thermal profile to allow customers to choose the thermal solution and

environmental parameters that best suit their platform implementation. Refer to the

Dual-Core Intel® Xeon® Processor 7200 Series

and Quad-Core Intel® Xeon®

Processor 7300 Series Thermal / Mechanical Design Guide

for details on system

thermal solution design, thermal profiles and environmental considerations.

The upper point of the thermal profile consists of the Thermal Design Power (TDP) and

the associated T

CASE

value. It should be noted that the upper point associated with

Quad-Core Intel® Xeon® X7350 Processor Thermal Profile (x = TDP and y = T

CASE_MAX

P @ TDP) represents a thermal solution design point. In actuality the processor case

temperature will not reach this value due to TCC activation (see

Figure 6-2

for Quad-

Core Intel® Xeon® X7350 Processor).

Analysis indicates that real applications are unlikely to cause the processor to consume

maximum power dissipation for sustained time periods. Intel recommends that

complete thermal solution designs target the Thermal Design Power (TDP) instead of

the maximum processor power consumption. The Thermal Monitor feature is intended

to help protect the processor in the event that an application exceeds the TDP

recommendation for a sustained time period. For more details on this feature, refer to

Section 6.2

. To ensure maximum flexibility for future requirements, systems should be

designed to the Flexible Motherboard (FMB) guidelines, even if a processor with lower

power dissipation is currently planned.

Thermal Monitor and Thermal Monitor 2

feature must be enabled for the processor to remain within its specifications

.

Notes:

1.

These values are specified at V

CC_MAX

for all processor frequencies. Systems must be designed to ensure

the processor is not to be subjected to any static V

CC

and I

CC

combination wherein V

CC

exceeds V

CC_MAX

at

specified I

CC

. Please refer to the loadline specifications in

Section 2

.

2.

Maximum Power is the highest power the processor will dissipate, regardless of its VID. Maximum Power is

measured at maximum T

CASE

.

3.

Thermal Design Power (TDP) should be used for processor thermal solution design targets. TDP is not the

maximum power that the processor can dissipate. TDP is measured at maximum T

CASE

.

4.

These specifications are based on pre-silicon estimates and simulations. These specifications will be

updated with characterized data from silicon measurements in a future release of this document.

5.

Power specifications are defined at all VIDs found in

Table 2-3

. The Quad-Core Intel® Xeon® E7300

Processor may be shipped under multiple VIDs for each frequency.

6.

FMB, or Flexible Motherboard, guidelines provide a design target for meeting all planned processor

frequency requirements.

Table 6-1.

Quad-Core Intel® Xeon® E7300 Processor Thermal Specifications

Core

Frequency

Thermal Design

Power

(W)

Minimum

T

CASE

(°C)

Maximum

T

CASE

(°C)

Notes

Launch to FMB

80

5

See

Figure 6-1

;

Table 6-2

;

1, 2, 3, 4, 5, 6

Section	Page
1 Introduction	9
1.1 Terminology	11
1.2 State of Data	13
1.3 References	13
2 Electrical Specifications	15
2.1 Front Side Bus and GTLREF	15
2.2 Decoupling Guidelines	15
2.2.1 VCC Decoupling	16
2.2.2 VTT Decoupling	16
2.2.3 Front Side Bus AGTL+ Decoupling	16
2.3 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking	16
2.3.1 Front Side Bus Frequency Select Signals (BSEL[2:0])	17
2.3.2 PLL Power Supply	17
2.4 Voltage Identification (VID)	17
2.5 Reserved, Unused, or Test Signals	20
2.6 Front Side Bus Signal Groups	20
2.7 CMOS Asynchronous and Open Drain Asynchronous Signals	22
2.8 Test Access Port (TAP) Connection	22
2.9 Mixing Processors	23
2.10 Absolute Maximum and Minimum Ratings	23
2.11 Processor DC Specifications	24
2.11.1 Flexible Motherboard Guidelines (FMB)	25
2.11.2 Platform Environmental Control Interface (PECI) DC Specifications	35
2.11.3 VCC Overshoot Specification	37
2.11.4 AGTL+ FSB Specifications	38
2.12 Front Side Bus AC Specifications	40
2.13 Processor AC Timing Waveforms	45
3 Mechanical Specifications	57
3.1 Package Mechanical Drawing	57
3.2 Processor Component Keepout Zones	60
3.3 Package Loading Specifications	66
3.4 Package Handling Guidelines	67
3.5 Package Insertion Specifications	67
3.6 Processor Mass Specifications	67
3.7 Processor Materials	67
3.8 Processor Markings	68
3.9 Processor Pin-Out Coordinates	69
4 Pin Listing	71
4.1 Pin Assignments	71
4.1.1 Pin Listing by Pin Name	71
4.1.2 Pin Listing by Pin Number	79
5 Signal Definitions	87
5.1 Signal Definitions.	87
6 Thermal Specifications	95
6.1 Package Thermal Specifications	95
6.1.1 Thermal Specifications	95
6.1.2 Thermal Metrology	102
6.2 Processor Thermal Features	103
6.2.1 Thermal Monitor Features	103
6.2.2 Thermal Monitor	103
6.2.3 Thermal Monitor 2	104
6.2.4 On-Demand Mode	105
6.2.5 PROCHOT# Signal	106
6.2.6 FORCEPR# Signal	106
6.2.7 THERMTRIP# Signal	106
6.3 Platform Environment Control Interface (PECI)	107
6.3.1 Introduction	107
6.3.2 PECI Specifications	108
7 Features	111
7.1 Power-On Configuration Options	111
7.2 Clock Control and Low Power States	111
7.2.1 Normal State	112
7.2.2 HALT or Extended HALT State	112
7.2.3 Stop-Grant State	114
7.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant Snoop State	115
7.3 Enhanced Intel SpeedStep® Technology	115
7.4 System Management Bus (SMBus) Interface	116
7.4.1 SMBus Device Addressing	117
7.4.2 PIROM and Scratch EEPROM Supported SMBus Transactions	118
7.4.3 Processor Information ROM (PIROM)	119
7.4.4 Checksums	137
7.4.5 Scratch EEPROM	137
8 Boxed Processor Specifications	139
8.1 Introduction	139
8.2 Thermal Specifications	139
8.2.1 Boxed Processor Cooling Requirements	139
9 Debug Tools Specifications	141
9.1 Debug Port System Requirements	141
9.2 Logic Analyzer Interface (LAI)	141
9.2.1 Mechanical Considerations	141

Intel BFCBASE Data Sheet - Page 96

Table 6-1., Quad-Core Intel® Xeon® E7300 Processor Thermal Specifications

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