Intel BFCBASE Data Sheet - Page 80
Table 4-2. Pin Listing by Pin Number Sheet, of 14, Pin No., Pin Name, Signal, Buffer Type, Direction
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Pin Listing Table 4-2. Pin Listing by Pin Number (Sheet 3 of 14) Pin No. Pin Name C23 C24 C25 C26 C27 C28 C29 C30 C31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 E1 E2 E3 E4 DEFER# TDI VSS IGNNE# SMI# PECI VSS VCC Reserved TESTIN1 VSS VID2 STPCLK# VSS INIT# MCERR# VCC AP1# VTT VSS A29# A25# VCC A18# A17# A9# VCC ADS# BR0# VSS RS1# BPRI# VCC COMP0 VSS_SENSE Reserved VSS Reserved VSS VCC VSS Reserved VID1 BPM5# Signal Buffer Type Direction Common Clk TAP Power/Other Async GTL+ Async GTL+ Power/Other Input Input Input Input Input Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Async GTL+ Power/Other Async GTL+ Common Clk Power/Other Common Clk Power/Other Power/Other Source Sync Source Sync Power/Other Source Sync Source Sync Source Sync Power/Other Common Clk Common Clk Power/Other Common Clk Common Clk Power/Other Power/Other Power/Other Input Output Input Input Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input Input Input Output Power/Other Power/Other Power/Other Power/Other Power/Other Output Common Clk Input/Output Table 4-2. Pin Listing by Pin Number (Sheet 4 of 14) Pin No. Pin Name Signal Buffer Type Direction E5 IERR# Async GTL+ Output E6 VCC E7 BPM2# Power/Other Common Clk Input/Output E8 BPM4# Common Clk Input/Output E9 E10 VSS AP0# Power/Other Common Clk Input/Output E11 E12 E13 VTT VTT A28# Power/Other Power/Other Source Sync Input/Output E14 A24# Source Sync Input/Output E15 E16 VSS COMP1 Power/Other Power/Other Input E17 E18 VSS DRDY# Power/Other Common Clk Input/Output E19 TRDY# Common Clk Input E20 E21 VCC RS0# Power/Other Common Clk Input E22 HIT# Common Clk Input/Output E23 E24 VSS TCK Power/Other TAP Input E25 TDO TAP Output E26 VCC E27 FERR#/PBE# Power/Other Async GTL+ Output E28 E29 E30 E31 F1 F2 F3 F4 F5 VCC VSS VCC VSS VCC VSS VSS VCC BPM3# Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Common Clk Input/Output F6 BPM0# Common Clk Input/Output F7 VSS F8 BPM1# Power/Other Common Clk Input/Output F9 GTLREF_ADD_END Power/Other Input F10 VTT F11 BINIT# Power/Other Common Clk Input/Output F12 BR1# Common Clk Input/Output F13 VSS F14 ADSTB1# Power/Other Source Sync Input/Output F15 A19# Source Sync Input/Output F16 A36# Source Sync Input/Output F17 ADSTB0# Source Sync Input/Output 80 Document Number: 318080-002