Document Number: 318080-002
5
Figures
2-1
Quad-Core Intel® Xeon® L7345 Processor
Load Current versus Time
.....................
27
2-2
Dual-Core Dual-Core Intel® Xeon® Processor 7200 Series Load Current
versus Time
......................................................................................................
28
2-3
Quad-Core Intel
®
Xeon
®
Processor 7200 Series and 7300 Series Load Current versus
Time28
2-4
Quad-Core
Intel® Xeon® X7350 Processor
Load Current versus Time
.................
29
2-5
Quad-Core Intel
®
Xeon
®
Processor 7200 Series and 7300 Series VCC Static and Transient
Tolerance Load Lines
.........................................................................................
31
2-6
Quad-Core
Intel® Xeon® X7350 Processor
VCC Static and Transient Tolerance
Load Lines
........................................................................................................
32
2-7
Quad-Core Intel® Xeon® L7345 Processor
V
CC
Static and Transient Tolerance
Load Lines
........................................................................................................
33
2-8
Dual-Core Intel® Xeon® Processor 7200 Series VCC Static and Transient
Tolerance Load Lines
.........................................................................................
34
2-9
Input Device Hysteresis
.....................................................................................
37
2-10
VCC Overshoot Example Waveform
......................................................................
38
2-11
Electrical Test Circuit
.........................................................................................
46
2-12
TCK Clock Waveform
.........................................................................................
46
2-13
Differential Clock Waveform
................................................................................
47
2-14
Differential Clock Crosspoint Specification
.............................................................
47
2-15
BCLK Waveform at Processor Pad and Pin
.............................................................
48
2-16
FSB Common Clock Valid Delay Timing Waveform
.................................................
48
2-17
FSB Source Synchronous 2X (Address) Timing Waveform
.......................................
49
2-18
FSB Source Synchronous 4X (Data) Timing Waveform
............................................
50
2-19
TAP Valid Delay Timing Waveform
.......................................................................
51
2-20
Test Reset (TRST#), Async GTL+ Input, and PROCHOT# Timing Waveform
...............
51
2-21
THERMTRIP# Power Down Sequence
...................................................................
51
2-22
SMBus Timing Waveform
....................................................................................
52
2-23
SMBus Valid Delay Timing Waveform
...................................................................
52
2-24
Voltage Sequence Timing Requirements
...............................................................
53
2-25
FERR#/PBE# Valid Delay Timing
.........................................................................
54
2-26
VID Step Timings
..............................................................................................
54
2-27
VID Step Times and Vcc Waveforms
....................................................................
55
3-1
Processor Package Assembly Sketch
....................................................................
57
3-2
Processor Package Drawing (Sheet 1 of 2)
............................................................
58
3-3
Processor Package Drawing (Sheet 2 of 2)
............................................................
59
3-4
Top Side Board Keepout Zones (Part 1)
................................................................
61
3-5
Top Side Board Keepout Zones (Part 2)
................................................................
62
3-6
Bottom Side Board Keepout Zones
.......................................................................
63
3-7
Board Mounting-Hole Keepout Zones
...................................................................
64
3-8
Volumetric Height Keep-Ins
................................................................................
65
3-9
Processor Topside Markings
................................................................................
68
3-10
Processor Bottom-Side Markings
.........................................................................
68
3-11
Processor Pin-Out Coordinates, Top View
..............................................................
69
6-1
Quad-Core Intel® Xeon® E7300 Processor Thermal Profile
.....................................
97
6-2
Quad-Core Intel® Xeon® X7350 Processor Thermal Profile
.....................................
98
6-3
Quad-Core Intel® Xeon® L7345 Processor Thermal Profile
...................................
100
6-4
Dual-Core Intel® Xeon® Processor 7200 Series Thermal Profile
...........................
101
6-5
Case Temperature (TCASE) Measurement Location
..............................................
103
6-6
Thermal Monitor 2 Frequency and Voltage Ordering
.............................................
105
6-7
PECI Topology
................................................................................................
107