Adaptec 1737100 Programmer Manual - Page 11

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w w w w Tables Table 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9 2-10 Receive Buffer Descriptor (One-size, 32-bit Addressing) 2-4 Receive Buffer Descriptor (One-size Buffer, 64-bit Addressing) 2-4 Short (Type 0) Completion Entry 2-6 Basic (Type 1) Completion Descriptor 2-6 Checksum (Type 2) Completion Descriptor 2-6 Full (Type 3) Completion Descriptor 2-6 Receive Completion Descriptor (Word 0) 2-7 Receive Completion Descriptor (Word 1) 2-8 Receive Completion Descriptor (Word 2) 2-9 Receive Completion Descriptor (Word 3) 2-9 3-1 Type 0 Transmit DMA Descriptor (32-bit Addressing Only) 3-6 3-2 End Bit Functionality 3-7 3-3 Intr Bit Functionality 3-7 3-4 Type 1 Transmit DMA Descriptor (32-bit Addressing) 3-8 3-5 Type 2 Transmit DMA Descriptor (64-bit Addressing) 3-9 3-6 Type 4 Transmit DMA Descriptor (32-bit Addressing only) 3-10 3-7 Transmit Completion Queue Entry Type = DMA Complete Entry 3-10 3-8 Transmit Completion Queue Entry Type = Transmit Complete Entry 3-11 4-1 Power Management States 4-8 4-2 Target Response to PCI Commands 4-10 4-3 Address Phase CBE[3:0] Values 4-13 5-1 Status/Control Register 5-3 5-2 Instruction Formats 5-6 6-1 PCI Configuration Header Registers Summary 6-1 6-2 AIC-6915 Functional Registers Summary 6-2 6-3 AIC-6915 Additional PCI Registers Summary 6-4 6-4 AIC-6915 Additional Ethernet Registers Summary 6-4 7-1 Shade Legends 7-1 7-2 AIC-6915 PCI Address Space 7-2 7-3 PCI Vendor ID Register 7-5 7-4 PCI Device ID Register 7-5 7-5 PCI Command Register 7-6 7-6 PCI Status Register 7-7 7-7 Device Revision ID Register 7-9 7-8 Program Interface Register 7-9 7-9 Subclass Register 7-9 Document Title: AIC-6915 Ethernet LAN Controller Programmer's Manual Stock Number: xxxxxx-xx Rev. x Page: Front Matter-ix ix Print Spec Number: xxxxxx-xx Rev. x Current Date: 10/10/98 ECN Date: xx/xx/xx

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ix
Document Title:
AIC-6915 Ethernet LAN Controller Programmer’s
Manual
Stock Number: xxxxxx-xx Rev. x
Page: Front Matter-ix
Print Spec Number: xxxxxx-xx Rev. x
Current Date: 10/10/98
ECN Date: xx/xx/xx
Table
▼▼▼▼
Tables
2-1
Receive Buffer Descriptor (One-size, 32-bit Addressing)
2-4
2-2
Receive Buffer Descriptor (One-size Buffer, 64-bit Addressing)
2-4
2-3
Short (Type 0) Completion Entry
2-6
2-4
Basic (Type 1) Completion Descriptor
2-6
2-5
Checksum (Type 2) Completion Descriptor
2-6
2-6
Full (Type 3) Completion Descriptor
2-6
2-7
Receive Completion Descriptor (Word 0)
2-7
2-8
Receive Completion Descriptor (Word 1)
2-8
2-9
Receive Completion Descriptor (Word 2)
2-9
2-10
Receive Completion Descriptor (Word 3)
2-9
3-1
Type 0 Transmit DMA Descriptor (32-bit Addressing Only)
3-6
3-2
End Bit Functionality
3-7
3-3
Intr Bit Functionality
3-7
3-4
Type 1 Transmit DMA Descriptor (32-bit Addressing)
3-8
3-5
Type 2 Transmit DMA Descriptor (64-bit Addressing)
3-9
3-6
Type 4 Transmit DMA Descriptor (32-bit Addressing only)
3-10
3-7
Transmit Completion Queue Entry Type = DMA Complete Entry
3-10
3-8
Transmit Completion Queue Entry Type = Transmit Complete Entry
3-11
4-1
Power Management States
4-8
4-2
Target Response to PCI Commands
4-10
4-3
Address Phase CBE[3:0] Values
4-13
5-1
Status/Control Register
5-3
5-2
Instruction Formats
5-6
6-1
PCI Configuration Header Registers Summary
6-1
6-2
AIC-6915 Functional Registers Summary
6-2
6-3
AIC-6915 Additional PCI Registers Summary
6-4
6-4
AIC-6915 Additional Ethernet Registers Summary
6-4
7-1
Shade Legends
7-1
7-2
AIC-6915 PCI Address Space
7-2
7-3
PCI Vendor ID Register
7-5
7-4
PCI Device ID Register
7-5
7-5
PCI Command Register
7-6
7-6
PCI Status Register
7-7
7-7
Device Revision ID Register
7-9
7-8
Program Interface Register
7-9
7-9
Subclass Register
7-9