Adaptec 1737100 Programmer Manual - Page 171
RxDescQ1Entries: Select the size of Receive Buffer Descriptor Queue 1 - either 256
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Sample Driver 6 RXDMACTRL (offset D0h): This register controls receive DMA operation and frame acceptance criteria. Required Fields: - RxCompletionQ2Enable: Enable the second Receive Completion Descriptor Queue if needed. - RxDmaQueueMode: Select the queue sorting criteria, if a second queue is needed. Sorting may be based on packet size or priority. 7 RXDESCQUEUE1CTRL (offset D4h): This register defines Receive Buffer Descriptor Queue 1. Required Fields: - RxQ1BufferLength: Select the size of each receive buffer in Queue 1. - RxPrefetchDescriptorsMode: Select normal or polling receive model. This value also applies to a second Receive Buffer Descriptor Queue, if used. - RxDescQ1Entries: Select the size of Receive Buffer Descriptor Queue 1 - either 256 or 2048 entries. This entry must be selected even if variable size queues are used. In this case, this size is the maximum size of the variable size queue. - RxVariableSizeQueues: Select the variable or fixed size Receive Buffer Descriptor Queue. 8 RXDESCQUEUE2CTRL (offset D8h): This register defines Receive Buffer Descriptor Queue 2. It is required only if two Receive Buffer Descriptor Queues are used. Required Fields: - RxQ2BufferLength: Specify the size of each receive buffer in Queue 2. If two Receive Buffer Descriptor Queues are implemented, and sorting is based on packet size, this length is used as the sorting criteria. Packets larger than this length are DMA-transferred to Queue 1, while larger packets are placed in Queue 2. - RxDescQ2Entries: Select the size of Receive Buffer Descriptor Queue 2 - either 256 or 2048 entries. This entry must be selected even if variable size queues are used. 9 RXDESCQUEUE1LOWADDRESS (offset E0h): This register defines the location of Receive Buffer Descriptor Queue 1. Required Fields: - RxDescQ1LowAddress: Assign the base address of the first Receive Buffer Descriptor Queue in hardware. 10 RXDESCQUEUE2LOWADDRESS (offset E4h): This register defines the location of Receive Buffer Descriptor Queue 2. It is required only if two queues are used. Required Fields: - RxDescQ2Address: Assign the base address of the second Receive Buffer Descriptor Queue in hardware. 8-11