Adaptec 1737100 Programmer Manual - Page 114
Type: R, Internal Registers Subgroup: Ethernet Functional Registers, Byte Address, ACh- AFh, Type: R
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AIC-6915 Ethernet LAN Controller Programmer's Manual TxDmaStatus2 Type: R Internal Registers Subgroup: Ethernet Functional Registers Byte Address: ACh- AFh Table 7-53. TxDmaStatus2 Register Reset Bit(s) rw Value Description/Function 31:29 r 0 FragmentCount: Specifies the number of buffer fragments that still have to be DMA-transferred in order to complete fetching of the entire frame. 28:16 r 0 FifoWritePointer: Current FIFO write pointer from transmit DMA. 15:3 r 0 FifoReadPointer: Current FIFO read pointer from transmit Frame. 2 r 0 TxLockDma: Indicates that the transmit frame is updating the link list and locking the transmit DMA. 1 r 0 TxLockFrame: Indicates that the transmit DMA engine is updating the link list and is locking the transmit frame. 0 r 0 TxEndValid: This bit indicates if the current transmit frame has completely been DMA-transferred to the FIFO. TransmitFrameCtrl/Status Register Type: R/W Internal Registers Subgroup: Ethernet Functional Registers Byte Address: B0h - B3h Table 7-54. TransmitFrameControlStatus Register Reset Bit(s) rw Value Description/Function 31:25 r 24:16 r 0 Mac/TX Interface: Interface signals between the MAC and TX blocks. These bits are: Start of Frame, UnderRun, Retry, Abort, and Pause. This field is used during debug only. 0 Tx Frame States: Indicates the state of the internal transmit frame state machine. 15:9 r/w 0 Tx Debug Config Bits: These bits configure the transmit DMA and transmit frame state machines to perform certain functions or make changes to certain states during debug. These bits are reserved for debugging purposes, software should always write "0" to these bits. 8 r/w 0 DmaCompletion After Transmit Complete: If this bit is cleared the AIC-6915 does not set the interrupt status bit TXFRAMECOMPLETEINT. If the bit is set, the AIC-6915 DMA- transfers a completion descriptor after completely transferring the entire frame. 7:0 r/w 4 TransmitThreshold: Specifies the programmable threshold used by the transmit engine to start transmitting data from a frame that is currently being DMA-transferred (end-of-frame not yet been fetched from host memory). The threshold (in bytes) is defined as: 16*TRANSMITTHRESHOLD. 7-42