Adaptec 1737100 Programmer Manual - Page 133
Type: R, Internal Registers Subgroup: PCI Extra Registers, Byte Address: 0108h-010Bh, Byte Address:
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Register Descriptions PCIMasterStatus2 Register Type: R Internal Registers Subgroup: PCI Extra Registers Byte Address: 0108h-010Bh Table 7-75. PCIMasterStatus2 Register Reset Bit(s) rw Value Description/Function 31:26 r 0 Reserved: Always read as 0. 25 r x System64: Provides the information of the system: Setting the bit indicates a 64-bit system, while clearing the bit indicates a 32-bit system. 24:10 r 1 PCIMainState: Provides the current state of the PCI master main state machine. The total number of states is 15. Each state is represented by 1 bit. 9:0 r 0 HCNT[9:0]: The Host Count register contains a count of the number of words to be transferred between system memory and the PCI bus when the PCI is an active bus master. HCNT decrements by one each time a word is transferred between system memory and the internal buffer. Transfers are inhibited when the count value of HCNT is zero. PCIDmaLowHostAddr Register Type: R Internal Registers Subgroup: PCI Extra Registers Byte Address: 010Ch - 010Fh Table 7-76. PCI DMALowHostAddress Register Reset Bit(s) rw Value Description/Function 31:0 r 0 LowHostAddr[31:0]: The Low Host address register contains the low (32-bit) word of the system memory byte address of the data being transferred to or from the AIC-6915 as an active bus master. This register is implemented as a counter that counts up by one for each byte transferred between the device and system memory. The value in this register is driven on the PCI AD[31:00] bus during the first Address phase in single address cycles or the second Address phase in dual address cycles. 7-61
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