Adaptec 1737100 Programmer Manual - Page 84

AIC-6915 Ethernet LAN Controller Programmer's Manual PCI HighBASEADR0 (Base Address 0) Register Type: R/W Internal Registers Subgroup: PCI Configuration Header Byte Address: 14h - 17h Note: When an access is made to an address that is mapped and enabled in both the BASEADR0 and EXROMCTL registers, the PCI responds with a target abort. Bit(s) rw 31:0 r/w Table 7-16. High Base Address 0 Register Reset Value Description/Function 0 BASEADR0[63:32]: Contains the upper 32-bits of memory address where the AIC-6915 is mapped. PCI BASEADR1 (Base Address 1) Register Type: R/W Internal Registers Subgroup: PCI Configuration Header Byte Address: 18h - 1Ch Table 7-17. Base Address 1 Register Reset Bit(s) rw Value Description/Function 31:8 r/w 0 BASEADR1[31:8]: Indicates the mapping capability of the 256byte system I/O space. 7:2 r 0 BASEADR1[7:3]: Indicates address space requirement. Always read as 0. 1 r 0 Reserved: Always read as 0. 0 r 1 I/O Space Indicator: Always reads 1. PCI CCIS (Configuration Card Information Structure) Register Type: R Internal Registers Subgroup: PCI Configuration Header Byte Address: 28h - 2Bh The CCIS register points to one of the possible address spaces where the card information structure begins. The pointer is used in a CardBus PC card environment. The value of this register is loaded from the external serial EPROM after a PCI hard reset. Bit(s) 31:28 27:3 2:0 Table 7-18. Configuration Card Information Structure Register Reset rw Value Description/Function r 0 ROM Image r 0 AddressSpaceOffset r 0 AddressSpaceIndicator 7-12