Adaptec 1737100 Programmer Manual - Page 94

Type: R, Internal Registers Subgroup: PCI Functional Registers, Byte Address: 4Ch - 4Fh, Type: R/W,

Page 94 highlights

AIC-6915 Ethernet LAN Controller Programmer's Manual PCIMonitor2 Register Type: R Internal Registers Subgroup: PCI Functional Registers Byte Address: 4Ch - 4Fh Table 7-30. PCI Monitor2 Register Reset Bit(s) rw Value Description/Function 31:16 r 0 PCIMasterBusUtilization: Provides a count of the total number of PCI clock cycles that the AIC-6915 asserts PCI_FRAME_ as an active PCI master, measured from the time the software driver resets the register. The count is presented in; 1 unit=64PCIClkCycles. The calculated PCI bus utilization is: ActiveTransferCount / (PCISlaveBusUtilization/64 + PCIMasterBusUtilization) This field is reset to zero if ACTIVETRANSFERCOUNT wraps around to 0. 15:0 r 0 ActiveTransferCount: Provides a count of the total number of PCI DMA data transfers (PCI_IRDY_ & PCI_TRDY_ are asserted). The count is presented in 1unit = 64cycles. This field is reset to zero if PCIMASTERBUSUTILIZATION wraps around to 0. PMC (Power Management Capabilities) Register Type: R/W Internal Registers Subgroup: PCI Functional Registers Byte Address: 50h - 53h Bit(s) 31:27 26 25 24:22 21 20 19 Table 7-31. Power Management Register Reset rw Value Description/Function r 00100b PmeSupport: Indicates the power state that the device supports when asserting PME_. The AIC-6915 is capable of asserting PME_ from the D0, D1 and D2 power states. PME is asserted when detecting a 'wake-up' frame or Link Fail. r 1 D2Support: The AIC-6915 supports the D2 power management state. r 0 D1Support: The AIC-6915 does not support the D1 power management state. r 0 Reserved: Always read as 0. r 0 DSI: This bit indicates whether special initialization of the function is required before the generic class device driver is able to use it. The AIC-6915 does not require special initialization. r 0 Auxiliary Power Source: This bit is only meaningful when PME_ is supported in D3 (cold) state. The AIC-6915 does not support this function. r 0 PME Clock, Setting this bit indicates that the function relies on the presence of the PCI clock for PME_ operation. The AIC-6915 generates PME_ without PCI clock. 7-22

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7-22
AIC-6915 Ethernet LAN Controller Programmer’s Manual
PCIMonitor2 Register
Type: R
Internal Registers Subgroup: PCI Functional Registers
Byte Address: 4Ch - 4Fh
PMC (Power Management Capabilities) Register
Type: R/W
Internal Registers Subgroup: PCI Functional Registers
Byte Address: 50h - 53h
Table 7-30. PCI Monitor2 Register
Bit(s)
rw
Reset
Value
Description/Function
31:16
r
0
PCIMasterBusUtilization
: Provides a count of the total number of
PCI clock cycles that the AIC-6915 asserts
PCI_FRAME_
as an active
PCI master, measured from the time the software driver resets the
register. The count is presented in; 1 unit=64PCIClkCycles. The
calculated PCI bus utilization is:
ActiveTransferCount / (PCISlaveBusUtilization/64 +
PCIMasterBusUtilization)
This field is reset to zero if
A
CTIVE
T
RANSFER
C
OUNT
wraps around
to 0.
15:0
r
0
ActiveTransferCount:
Provides a count of the total number of PCI
DMA data transfers (
PCI_IRDY_ & PCI_TRDY_
are asserted). The
count is presented in 1unit = 64cycles. This field is reset to zero if
P
CI
M
ASTER
B
US
U
TILIZATION
wraps around to 0.
Table 7-31. Power Management Register
Bit(s)
rw
Reset
Value
Description/Function
31:27
r
00100b
PmeSupport:
Indicates the power state that the device supports
when asserting
PME_
. The AIC-6915 is capable of asserting PME_
from the D0, D1 and D2 power states.
PME
is asserted when
detecting a ‘wake-up’ frame or Link Fail.
26
r
1
D2Support:
The AIC-6915 supports the D2 power management
state.
25
r
0
D1Support:
The AIC-6915 does not support the D1 power
management state.
24:22
r
0
Reserved:
Always read as 0.
21
r
0
DSI:
This bit indicates whether special initialization of the function
is required before the generic class device driver is able to use it. The
AIC-6915 does not require special initialization.
20
r
0
Auxiliary Power Source
: This bit is only meaningful when PME_ is
supported in D3 (cold) state. The AIC-6915 does not support this
function.
19
r
0
PME Clock
, Setting this bit indicates that the function relies on the
presence of the PCI clock for
PME_
operation. The AIC-6915
generates
PME_
without PCI clock.