Adaptec 1737100 Programmer Manual - Page 168
Receive Buffer Descriptor Queue
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AIC-6915 Ethernet LAN Controller Programmer's Manual Type 2 Completion Descriptor The Type 2 descriptor is also known as the checksum completion descriptor. It consists of two word entries. The first word is identical to the Type 0 descriptor. The second word contains extended status information and a partial TCP/UDP checksum. To program the AIC-6915 to use a Type 2 descriptor, the developer must set RXCOMPLETIONQ1TYPE in register RXCOMPLETIONQUEUE1CTRL to 10b. Type 3 Completion Descriptor The Type 3 descriptor is also known as the full completion descriptor. It consists of four word entries. The first word is identical to the Type 0 descriptor. The second word contains additional status information and an index pointing to the first buffer used in the buffer queue. The third word contains a partial TCP/UDP checksum and a VLAN ID and priority. The fourth word is a packet timestamp. To program the AIC-6915 to use a Type 3 descriptor, the developer must set RXCOMPLETIONQ1TYPE in register RXCOMPLETIONQUEUE1CTRL to 11b. Receive Buffer Descriptor Queue There are two types of receive buffer descriptors, a 32-bit descriptor and a 64-bit descriptor. The receive buffer descriptor type is programmed using the RX64BITBUFFERADDRESSES bit in the RXDESCQUEUE1CTRL register. The number of entries in the Receive Buffer Descriptor Queue is fixed at either 256 or 2048. This number of entries is programmed using the RXDESCQ1ENTRIES bit in the RXDESCQUEUE1CTRL register. The receive buffer descriptor contains the physical address of the buffer which contains the actual data for the packet just received. It also contains an END bit, which is used by the driver to indicate the end of the buffer queue when the receive polling model is implemented. The END bit is not set when the receive producer-consumer model is selected. The Receive Buffer Descriptor also contains a VALID bit, which is also used only in the polling model. The VALID bit is set by the driver upon initialization and whenever a receive buffer resource has been freed by the driver following processing such that it is available again for use by the hardware. Receive Buffer Descriptor Types 32-bit buffer descriptor This descriptor type is used in most operating systems. The 32-bit Receive Buffer Descriptor consists of a receive buffer address field, an END bit, and a VALID bit. This descriptor type is selected by setting the RX64BITBUFFERADDRESSES bit to zero in register RXDESCQUEUE1CTRL. 64-bit buffer descriptor This buffer descriptor is useful when the operating system supports 64-bit addressing. The 64-bit Receive Buffer Descriptor consists of a 64-bit receive buffer address field which is split into the high and low addresses, an END bit, and a VALID bit. This descriptor type is selected by setting the RX64BITBUFFERADDRESSES bit to one in register RXDESCQUEUE1CTRL. 8-8
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