Adaptec 1737100 Programmer Manual - Page 119

Type: R/W, Internal Registers Subgroup: Ethernet Functional Registers, Byte Address, C8h - CBh, CCh

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Register Descriptions CompletionQueueProducerIndex Type: R/W Internal Registers Subgroup: Ethernet Functional Registers Byte Address: C8h - CBh Table 7-60. CompletionQueueProducerIndex Register Reset Bit(s) rw Value Description/Function 31:26 r 0 Reserved: Always read and written as zero. 25:16 r/w 0 TxCompletionProducerIndex: Written by the AIC-6915 and read by the host driver. The AIC-6915 increments the index by 1 whenever a completion descriptor is successfully DMA-transferred to the transmit (or shared) completion list in host memory. The software driver writes this field only if TxCompletionProducerWe is set, which also disables the completion list. 15:10 r 0 Reserved: Always read and write 0. 9:0 r/w 0 RxCompletionQ1ProducerIndex: Written by the AIC-6915 and read by the host driver. The AIC-6915 increments the index by 1 whenever a completion descriptor is successfully DMA-transferred to the receive completion list in host memory. The software driver can write this field only if RxCompletionProducerWe is set, which also disables the completion list. RxHiPrCompletionPtrs Type: R/W Internal Registers Subgroup: Ethernet Functional Registers Byte Address: CCh - CFh Table 7-61. RxHiPrCompletionPtrs Register Reset Bit(s) rw Value Description/Function 31:26 r 0 Reserved: Always read and write 0. 25:16 r/w 0 RxCompletionQ2ProducerIndex: Written by the AIC-6915 and read by host driver. The AIC-6915 increments the index by 1 whenever a completion descriptor is successfully DMA-transferred to completion list 2 in host memory. The software driver can write this field only if RxCompletionQueue2ProducerWe is set, which also disables the completion list. 15 r/w 0 RxCompletionQ2ThresholdMode: This bit indicates when RxCompletionQueue2Int is asserted. In the default state ('0') the interrupt is asserted if the number of empty entries in the queue is less than or equal to a programmable threshold. When the bit is set, the interrupt status bit is asserted if the number of valid completion descriptors in the queue is greater than or equal to a programmable threshold. 14:10 r 0 Reserved: Always read and write 0. 7-47

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7-47
Register Descriptions
CompletionQueueProducerIndex
Type: R/W
Internal Registers Subgroup: Ethernet Functional Registers
Byte Address:
C8h - CBh
RxHiPrCompletionPtrs
Type: R/W
Internal Registers Subgroup: Ethernet Functional Registers
Byte Address:
CCh - CFh
Table 7-60. CompletionQueueProducerIndex Register
Bit(s)
rw
Reset
Value
Description/Function
31:26
r
0
Reserved:
Always read and written as zero.
25:16
r/w
0
TxCompletionProducerIndex:
Written by the AIC-6915 and read by
the host driver. The AIC-6915 increments the index by 1 whenever a
completion descriptor is successfully DMA-transferred to the
transmit (or shared) completion list in host memory. The software
driver writes this field only if
TxCompletionProducerWe
is set,
which also disables the completion list.
15:10
r
0
Reserved:
Always read and write 0.
9:0
r/w
0
RxCompletionQ1ProducerIndex:
Written by the AIC-6915 and read
by the host driver. The AIC-6915 increments the index by 1
whenever a completion descriptor is successfully DMA-transferred
to the receive completion list in host memory. The software driver
can write this field only if
RxCompletionProducerWe
is set, which
also disables the completion list.
Table 7-61. RxHiPrCompletionPtrs Register
Bit(s)
rw
Reset
Value
Description/Function
31:26
r
0
Reserved:
Always read and write 0.
25:16
r/w
0
RxCompletionQ2ProducerIndex:
Written by the AIC-6915 and read
by host driver. The AIC-6915 increments the index by 1 whenever a
completion descriptor is successfully DMA-transferred to
completion list 2 in host memory. The software driver can write this
field only if
RxCompletionQueue2ProducerWe
is set, which also
disables the completion list.
15
r/w
0
RxCompletionQ2ThresholdMode
: This bit indicates when
RxCompletionQueue2Int
is asserted. In the default state (‘0’) the
interrupt is asserted if the number of empty entries in the queue is
less than or equal to a programmable threshold. When the bit is set,
the interrupt status bit is asserted if the number of valid completion
descriptors in the queue is greater than or equal to a programmable
threshold.
14:10
r
0
Reserved:
Always read and write 0.