Adaptec 1737100 Programmer Manual - Page 98

Internal Registers Subgroup: PCI Functional Registers

Page 98 highlights

AIC-6915 Ethernet LAN Controller Programmer's Manual PCIComplianceTesting Register Type: R/W Internal Registers Subgroup: PCI Functional Registers Byte Address: 64h - 67h This register is used for PCI compliance checker testing purposes only and has no meaning to the AIC-6915.. Table 7-36. PCIComplianceTesting Register Reset Bit(s) rw Value Description/Function 31:0 r/w 0 PCI compliance data word. IndirectIoAddress Register Type: R/W Internal Registers Subgroup: PCI Functional Registers Byte Address: 68h - 6Bh This register stores the target address for an indirect I/O slave cycle. It can be accessed only in I/O or configuration space, using I/O configuration Read or Write commands. Table 7-37. IndirectIoAddress Register Reset Bit(s) rw Value Description/Function 31:19 r 0 Reserved 18:2 r/w 0 IndirectIoAddress: Points to a word (4-byte) location in the AIC-6915 512-KByte address space. When an external PCI Master starts a legal access to the Indirect I/O Data Port register (IndirectIoDataPort), the PCI target uses the IndirectIoAddress for addressing the requested register. 1:0 r 0 Reserved IndirectIoDataPort Register Type: R/W Internal Registers Subgroup: PCI Functional Registers Byte Address: 6Ch - 6Fh Table 7-38. IndirectIoDataPort Register Reset Bit(s) rw value Description/Function 31:0 r/w IndirectIoDataPort: This is a visual register/data port used by the software to access any location within the 512-KByte address space. It can only be accessed in I/O or configuration space, using I/O or configuration Read or Write commands. When the PCI Target decodes a legal access to this register, it uses the address stored in INDIRECTIOADDRESS to execute the requested read/write operation. A legal I/O access occurs when the least-significant two address bits match the asserted byte enables. 7-26

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • 155
  • 156
  • 157
  • 158
  • 159
  • 160
  • 161
  • 162
  • 163
  • 164
  • 165
  • 166
  • 167
  • 168
  • 169
  • 170
  • 171
  • 172
  • 173
  • 174
  • 175
  • 176
  • 177
  • 178
  • 179
  • 180
  • 181
  • 182
  • 183
  • 184
  • 185
  • 186
  • 187
  • 188
  • 189
  • 190

7-26
AIC-6915 Ethernet LAN Controller Programmer’s Manual
PCIComplianceTesting Register
Type: R/W
Internal Registers Subgroup: PCI Functional Registers
Byte Address: 64h - 67h
This register is used for PCI compliance checker testing purposes only and has no
meaning to the AIC-6915..
IndirectIoAddress Register
Type: R/W
Internal Registers Subgroup: PCI Functional Registers
Byte Address: 68h - 6Bh
This register stores the target address for an indirect I/O slave cycle. It can be
accessed only in I/O or configuration space, using I/O configuration Read or Write
commands.
IndirectIoDataPort Register
Type: R/W
Internal Registers Subgroup: PCI Functional Registers
Byte Address: 6Ch - 6Fh
Table 7-36. PCIComplianceTesting Register
Bit(s)
rw
Reset
Value
Description/Function
31:0
r/w
0
PCI compliance data word.
Table 7-37. IndirectIoAddress Register
Bit(s)
rw
Reset
Value
Description/Function
31:19
r
0
Reserved
18:2
r/w
0
IndirectIoAddress:
Points to a word (4-byte) location in the
AIC-6915 512-KByte address space. When an external PCI Master
starts a legal access to the Indirect I/O Data Port register
(
IndirectIoDataPort
), the PCI target uses the
IndirectIoAddress
for
addressing the requested register.
1:0
r
0
Reserved
Table 7-38. IndirectIoDataPort Register
Bit(s)
rw
Reset
value
Description/Function
31:0
r/w
IndirectIoDataPort:
This is a visual register/data port used by the
software to access any location within the 512-KByte address space.
It can only be accessed in I/O or configuration space, using I/O or
configuration Read or Write commands. When the PCI Target
decodes a legal access to this register, it uses the address stored in
I
NDIRECT
I
O
A
DDRESS
to execute the requested read/write
operation. A legal I/O access occurs when the least-significant two
address bits match the asserted byte enables.