Adaptec 1737100 Programmer Manual - Page 143

MAC Control Registers

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Register Descriptions MAC Control Registers MacConfig1 Register Type: R/W Internal Registers Subgroup: MAC Registers Byte Address: 5000h - 5003h Table 7-91. MacConfig1 Register Reset Bit(s) rw Value Description/Function 31:16 r/w 0 Reserved: Always read as 0. 15 r/w 0 SoftRst: Software reset to internal MAC logic. This bit has no effect on any configuration register state. 14 r/w 0 MIILoopBack: All transmit MII signals, including data and control, are connected to receive side so that same transmitted data are received at the same time. 13:12 r/w 0 TestMode: For simulation and manufacturing test purposes. This field should not be used during normal operation. It is encoded as follows: 0 x --- normal operation 1 0 --- transmit module test mode 1 1 --- receive module test mode 11 r/w 10 r/w 9 r/w 0 TxFlowEn: Transmit flow control enable. Setting this bit enables transmitting flow control (pause) frames by setting the TXCTLFRAME in MACCONFIG2 register. The value in the flow control frame is taken from TXPAUSETIMER register. 0 RxFlowEn: Receive flow control enable. When this bit is cleared, pause frames are treated as other control frames. When the bit is set, 'pause' frames (one type of a control frame) are passed to the transmit side and may stop or start the transmit operation. 0 Preamble Detect Count: Setting this bit causes the MAC to detect up to 11 bytes of preamble before discarding the frame. Clearing the bit causes the MAC to detect up to 32 bytes of preamble before discarding the frame. 8 r/w 0 PassAllRxPackets: When this bit is cleared, control frames are discarded and not DMA-transferred to host memory. When the bit is set, all control frames are treated as regular frames and are DMA- transferred to host memory. 7 r/w 0 PurePreamble: When this bit is set, the MAC module checks the preamble of received frames and discards frames with a bad preamble. If this is cleared, the MAC ignores the preamble field. 6 r/w 0 LengthCheck: Frame length checking. When this bit is set, transmit and receive module parse the Length field of an Ethernet packet and compares it with the actual packet length. 7-71

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7-71
Register Descriptions
MAC Control Registers
MacConfig1 Register
Type: R/W
Internal Registers Subgroup: MAC Registers
Byte Address:
5000h - 5003h
Table 7-91. MacConfig1 Register
Bit(s)
rw
Reset
Value
Description/Function
31:16
r/w
0
Reserved:
Always read as 0.
15
r/w
0
SoftRst:
Software reset to internal MAC logic. This bit has no effect
on any configuration register state.
14
r/w
0
MIILoopBack:
All transmit MII signals, including data and control,
are connected to receive side so that same transmitted data are
received at the same time.
13:12
r/w
0
TestMode:
For simulation and manufacturing test purposes. This
field should not be used during normal operation. It is encoded as
follows:
0
x
---
normal operation
1
0
---
transmit module test mode
1
1
---
receive module test mode
11
r/w
0
TxFlowEn:
Transmit flow control enable. Setting this bit enables
transmitting flow control (pause) frames by setting the
T
X
C
TL
F
RAME
in
M
AC
C
ONFIG
2
register. The value in the flow
control frame is taken from
T
X
P
AUSE
T
IMER
register.
10
r/w
0
RxFlowEn:
Receive flow control enable. When this bit is cleared,
pause frames are treated as other control frames. When the bit is
set, ‘pause’ frames (one type of a control frame) are passed to the
transmit side and may stop or start the transmit operation.
9
r/w
0
Preamble Detect Count:
Setting this bit causes the MAC to detect
up to 11 bytes of preamble before discarding the frame. Clearing the
bit causes the MAC to detect up to 32 bytes of preamble before
discarding the frame.
8
r/w
0
PassAllRxPackets:
When this bit is cleared, control frames are
discarded and not DMA-transferred to host memory. When the bit
is set, all control frames are treated as regular frames and are DMA-
transferred to host memory.
7
r/w
0
PurePreamble:
When this bit is set, the MAC module checks the
preamble of received frames and discards frames with a bad
preamble. If this is cleared, the MAC ignores the preamble field.
6
r/w
0
LengthCheck:
Frame length checking. When this bit is set, transmit
and receive module parse the Length field of an Ethernet packet
and compares it with the actual packet length.