Adaptec 1737100 Programmer Manual - Page 149
Type: R/W, Internal Registers Subgroup: MAC Registers, Byte Address, 5020h- 5023h, 5024h - 5027h
UPC - 760884136362
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Register Descriptions ReTxCnt Register Type: R/W Internal Registers Subgroup: MAC Registers Byte Address: 5020h- 5023h Table 7-99. ReTxCnt Register Reset Bit(s) rw Value Description/Function 31:4 r/w 0 Reserved: Always read as 0. 3:0 r/w 0 ReTxCnt: This counter keeps track of the number of times a retransmission has occurred. The final count is loaded in statistics vectors. It should only be written for test purposes, such as speeding up simulation time. RandomNumGen Register Type: R/W Internal Registers Subgroup: MAC Registers Byte Address: 5024h - 5027h Table 7-100. RandomNumGen Register Reset Bit(s) rw Value Description/Function 31:10 r/w 0 Reserved: Always read as 0. 9:0 r/w 0 RandomNumGen: This is a Linear Feedback Shift Register (LFSR) that generates random numbers which influence the number of slot times in collision backoff. It should only be written for test purposes, such as loading a predictable number to it rather than random. 7-77