Adaptec 1737100 Programmer Manual - Page 22
Host Data Structures
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AIC-6915 Ethernet LAN Controller Programmer's Manual s VLAN support: - Address filtering based on VLAN - Ability to delete VLAN tag and number from frame returned to the host s Optional second buffer list for allocating two different buffer sizes Host Data Structures Figure 2-1 illustrates the AIC-6915 receive data structures. Receive Buffers Receive Buffer Descriptor Queue (256/2KByte) Adrs Adrs Adrs Adrs Adrs Host Memory On-chip Receive Completion Queue (2KByte entries) Start End Len Stat 1 per Frame Adrs ListLen Adrs Write Read BufferLength Write Read (2 Queues are available for 2 different sizes of buffers) (2 completion Queues allow for 2 priorities) Figure 2-1. The AIC-6915 Receive Data Structures Producer and Consumer Indices The transmit, receive, and completion descriptors are stored in circular queues. With the descriptor queue, the host writes entries into the queue. The AIC-6915 reads from the descriptor queue and writes to the completion queue, which is in turn read by the host. The AIC-6915 maintains onchip Producer and Consumer indexes to each queue. The first element of any queue has an index of 0. The Producer Index indicates the next entry of the queue to be written, while the Consumer Index indicates the next entry in the queue to be read. If Producer and Consumer indices are equal, the queue is empty. If (Producer+1) mod QueueSize is equal to Consumer then the queue is full. The maximum number of entries placed in a queue at one time is the queue size minus one. Receive DMA Descriptor Queues The AIC-6915 contains two Producer/Consumer type DMA Receive Descriptor Queues that contain a maximum of either 256 or 2048 entries. A variable option permits the use of a smaller queue. Host Buffer addresses must be aligned to a word (4-byte) boundary. For best performance, addresses should also be aligned to cacheline boundary. 2-2
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