Adaptec 1737100 Programmer Manual - Page 75

Memory Mapped and Indirect I/O Mapped

Page 75 highlights

Register Descriptions Memory Mapped and Indirect I/O Mapped Expansion ROM space 512K PCI Address Map 0x7FFFF 64K Internal Registers Address Map 0xFFFF Reserved 0xE000 Ethernet FIFO Access 0xC000 Rx Frame Processor Instruction memory 0xA000 Memory and Indirect I/O access Reserved 0x60000 Internal registers (includes external PHY MII registers) (~16K words (~64KBytes)) 0x50000 External registers (16K words (64KBytes)) 0x40000 (PCI clock domain) (E)EPROM R/W (64KByte words (256KBytes)) (PCI clock domain) 0x00000 Tx Frame Processor Instruction memory 0x8000 Statistic register file 0x7000 Address filtering 0x6000 MAC registers 0x5000 Ethernet extra registers 0x4000 Physical (MII) registers up to 32 devices, 256-byte each 0x2000 Serial EPROM 0x1000 PCI extra registers 0x0100 0x0070 0x0040 0x0000 Functional registers Ethernet PCI PCI Configuration header registers Figure 7-1. AIC-6915 PCI Address Map Memory/Config/ I/O direct access 7-3

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7-3
Register Descriptions
(E)EPROM R/W
Internal registers
External registers
0x00000
0x40000
(64KByte words (256KBytes))
(~16K words (~64KBytes))
(16K words (64KBytes))
0x50000
0x60000
0x7FFFF
(PCI clock domain)
(PCI clock domain)
Reserved
Memory Mapped and Indirect I/O Mapped
Memory/Config/
512K PCI Address Map
64K Internal Registers Address Map
0x0000
PCI Configuration
Functional
registers
0x0040
0x0100
0x8000
0xA000
MAC registers
0xC000
0xFFFF
0x5000
Rx Frame Processor
Instruction memory
Tx Frame Processor
Instruction memory
0x6000
0x7000
Statistic register file
Address filtering
0x4000
Physical (MII) registers
up to 32 devices,
256-byte each
Reserved
I
/O direct access
PCI extra registers
Ethernet
PCI
0x0070
Ethernet extra registers
0x2000
Serial EPROM
0x1000
(includes external
PHY MII registers)
Expansion ROM space
Memory and Indirect I/O access
Ethernet FIFO
0xE000
header registers
Figure 7-1. AIC-6915 PCI Address Map
Access