Adaptec 1737100 Programmer Manual - Page 6
PCI Module Architecture, Frame Processor Architecture, AIC-6915 Internal Registers Summary
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AIC-6915 Ethernet LAN Controller Programmer's Manual 4 PCI Module Architecture Features 4-1 PCI Block Diagram 4-3 PCI Master Module 4-4 64-bit PCI Bus Master 4-5 Arbitration 4-6 PCI Target Module 4-6 Power Management 4-8 CardBus 4-9 Retry Function 4-9 Response to PCI Commands 4-9 Configuration Address Space 4-11 I/O Address Space (Direct Access) 4-11 I/O Address Space (Indirect Access) 4-11 Expansion ROM Address Space 4-12 Memory Address Space 4-12 Parity 4-12 SERR_ 4-12 PERR_ 4-13 The Command And Byte Enable Bits CBE[3:0]_ 4-13 Illegal Behavior 4-14 5 Frame Processor Architecture Features 5-1 General Architecture & Operation 5-1 Wake-up Mode 5-2 Transmit Checksum Accelerator 5-2 GFP Address Space 5-3 Internal Registers 5-3 External Registers 5-4 Block Diagram 5-5 Instruction Formats 5-6 6 AIC-6915 Internal Registers Summary PCI Configuration Header Registers Summary 6-1 AIC-6915 Functional Registers Summary 6-2 Additional PCI Registers Summary 6-4 Additional Ethernet Registers Summary 6-4 iv