Adaptec 1737100 Programmer Manual - Page 19
Block Diagram
UPC - 760884136362
View all Adaptec 1737100 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 19 highlights
Introduction Block Diagram Figure 1-1 is a block diagram of the AIC-6915. Status (Receive) MAC (Transmit) Data (8) Status Data (8) Station Address TCP Checksum Wakeup Statistics TxFrame Sync. Status RxFrame Control RxDMA Receive Clock FIFO Bus (32-bits) Arbiter 8 KByte SRAM Combined Tx/Rx FIFO TxDMA TCP Checksum Serial EPROM Comp. DMA Bus (64-bits) EPROM Port BusAccessControl (64 bits) SlaveAccess, system registers PCI Clock (32 bits) (Master) PCI (Slave) Status Receive Clock Domain PCI Clock Domain Transmit Clock Domain PCI Bus (64-bits) Figure 1-1. AIC-6915 Block Diagram 1-5
1-5
Introduction
Block Diagram
Figure 1-1 is a block diagram of the AIC-6915.
8 KByte SRAM
Combined
Tx/Rx FIFO
PCI
BusAccessControl
SlaveAccess
, system registers
(
Slave)
(Master)
MAC
(
Transmit
)
(
Receive
)
Data (8)
Status
Status
(32 bits)
(64 bits)
PCI Bus (64-bits)
EPROM
Serial
Port
EPROM
DMA Bus (64-bits)
FIFO Bus (32-bits)
RxDMA
RxFrame
TxFrame
TxDMA
Station
Address
Data (8)
Control
Arbiter
Sync
.
PCI Clock
Comp
.
Receive Clock
Status
Statistics
TCP
Checksum
Wakeup
TCP
Checksum
Status
Receive Clock Domain
PCI Clock Domain
Transmit Clock Domain
Figure 1-1. AIC-6915 Block Diagram