Adaptec 1737100 Programmer Manual - Page 165

RxQ12DoneIntEn = 1

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Sample Driver 8 InterruptStatus (offset 80h): The InterruptStatus register should be set to zero during initialization. There are two types of status bits - those that are cleared on read or write, and others that must be cleared at the source. 9 InterruptEnable (offset 88h): This register indicates which events should trigger an interrupt. It is application-specific, but at a minimum the following interrupts must be enabled. Required Fields: - RxQ1(2)DoneIntEn = 1: This is the normal receive interrupt. Either it or EarlyRxQ1(2)Int must be set to generate receive interrupts. - TxDmaDoneIntEn = 1: This enables transmit interrupts upon DMA completion. Either this interrupt or TxFrameCompleteInt or TxQueueDoneInt must be set to generate transmit interrupts. Example: // Windows NT driver example of driver reset. // The board has already been discovered. // Reset the PHY InitAutonegotiate(); // Initialize GeneralEthernetCtrl register to stop any DMA activity AIC6915_WRITE_REG(Adapter->RegisterBaseVa->GeneralEthernetCtrl, 0); // Perform a software reset on the chip AIC6915_READ_REG(PCIDeviceConfig, &PCIValue); Delay(2); AIC6915_WRITE_REG(PCIDeviceConfig, 0); Delay(2); AIC6915_WRITE_REG(PCIDeviceConfig, SOFTWARE_RESET); Delay(2); AIC6915_WRITE_REG(PCIDeviceConfig, PCIValue); Delay(2); // Clear the PCI Status register to clear any previous error conditions. // Write all 1's to clear all bits. PCIValue = 0xffff; NdisWritePciSlotInformation( Adapter->MiniportAdapterHandle, Adapter->SlotNumber, PCI_CONF_STATUS, &PCIValue, sizeof(USHORT)); // Initialize MacConfig1 register // Read current value AIC6915_READ_REG(Adapter->RegisterBaseVa->MacConfig1, &MacConfig1Value); // Set duplex mode and any other control bits as needed. MacConfig1Value.FullDuplex = DuplexMode; // determined from registry or MII 8-5

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8-5
Sample Driver
8
InterruptStatus (offset 80h):
The InterruptStatus register should be set to zero during
initialization.
There are two types of status bits - those that are cleared on read or
write, and others that must be cleared at the source.
9
InterruptEnable (offset 88h):
This register indicates which events should trigger an
interrupt.
It is application-specific, but at a minimum the following interrupts must
be enabled.
Required Fields:
–
RxQ1(2)DoneIntEn = 1:
This is the normal receive interrupt.
Either it or
EarlyRxQ1(2)Int must be set to generate receive interrupts.
–
TxDmaDoneIntEn = 1:
This enables transmit interrupts upon DMA completion.
Either this interrupt or TxFrameCompleteInt or TxQueueDoneInt must be set to
generate transmit interrupts.
Example:
// Windows NT driver example of driver reset.
// The board has already been discovered.
// Reset the PHY
InitAutonegotiate();
// Initialize GeneralEthernetCtrl register to stop any DMA activity
AIC6915_WRITE_REG(Adapter->RegisterBaseVa->GeneralEthernetCtrl, 0);
// Perform a software reset on the chip
AIC6915_READ_REG(PCIDeviceConfig, &PCIValue);
Delay(2);
AIC6915_WRITE_REG(PCIDeviceConfig, 0);
Delay(2);
AIC6915_WRITE_REG(PCIDeviceConfig, SOFTWARE_RESET);
Delay(2);
AIC6915_WRITE_REG(PCIDeviceConfig, PCIValue);
Delay(2);
// Clear the PCI Status register to clear any previous error conditions.
// Write all 1's to clear all bits.
PCIValue = 0xffff;
NdisWritePciSlotInformation(
Adapter->MiniportAdapterHandle,
Adapter->SlotNumber,
PCI_CONF_STATUS,
&PCIValue,
sizeof(USHORT));
// Initialize MacConfig1 register
// Read current value
AIC6915_READ_REG(Adapter->RegisterBaseVa->MacConfig1, &MacConfig1Value);
// Set duplex mode and any other control bits as needed.
MacConfig1Value.FullDuplex = DuplexMode;
// determined from registry or MII