Adaptec 1737100 Programmer Manual - Page 24

AIC-6915 Ethernet LAN Controller Programmer's Manual 32-bit Addressing Mode Table 2-1. Receive Buffer Descriptor (One-size, 32-bit Addressing) 31 24 23 16 15 Address 8 7 64-bit Addressing Mode 0 EV Table 2-2. Receive Buffer Descriptor (One-size Buffer, 64-bit Addressing) 31 24 23 16 15 8 7 LowAddress HighAddress 0 EV Descriptor Fields: s Address - The address of the buffer. s LowAddress - Least-significant 32-bits of address. s HighAddress - Most-significant 32-bits of address. s E / End - This bit is set to indicate the last descriptor. The next descriptor should be taken from the beginning of the list. This bit should only be set when the receive descriptors are in prefetch mode. It must be cleared otherwise. s V / Valid - In prefetch mode, this bit should be set if the descriptor is valid. Completion/Status Descriptor Queue There are two receive completion descriptor queues, one for high-priority frames and one for low-priority frames. The completion queues include the following features: s Producer/Consumer type completion queue. s Programmable queue contains a separate list for receive, or the queue can be shared between transmit and receive. s A second list is available for high-priority frames. This cannot be shared with transmit. s Software can zero the word being read and check for a nonzero value to confirm that new status was written. No valid descriptors will be all zero's. s Two and four word completion descriptors include full status. s Completion descriptor queues must be aligned on a 256-byte boundary. s Completion descriptors may be 1, 2, or 4 words, depending on the amount of information required by the driver. Only 1 or 2 word completion descriptors may be used if the receive and transmit completion queues are shared. 2-4