Intel S2600GZ S2600GZ/GL - Page 248

Intel® Server Board S2600GZ/GL TPS Appendix D: POST Code Diagnostic LED Decoder Diagnostic LED Decoder 1 = LED On, 0 = LED Off Upper Nibble Lower Nibble Checkpoint MSB LSB 8h 4h 2h 1h 8h 4h 2h 1h Description LED B4h B5h B6h B7h B8h B9h BAh BBh BCh BFh #7 #6 #5 #4 #3 #2 #1 #0 1 0 1 1 0 1 0 0 Evaluate RAS modes and save rank information 1 0 1 1 0 1 0 1 Program registers on the channel level 1 0 1 1 0 1 1 0 Perform the JEDEC defined initialization sequence 1 0 1 1 0 1 1 1 Train DDR3 ranks 1 0 1 1 1 0 0 0 Initialize CLTT/OLTT 1 0 1 1 1 0 0 1 Hardware memory test and init 1 0 1 1 1 0 1 0 Execute software memory init 1 0 1 1 1 0 1 1 Program memory map and interleaving 1 0 1 1 1 1 0 0 Program RAS configuration 1 0 1 1 1 1 1 1 MRC is done Memory Initialization at the beginning of POST includes multiple functions, including: discovery, channel training, validation that the DIMM population is acceptable and functional, initialization of the IMC and other hardware settings, and initialization of applicable RAS configurations. When a major memory initialization error occurs and prevents the system from booting with data integrity, a beep code is generated, the MRC will display a fatal error code on the diagnostic LEDs, and a system halt command is executed. Fatal MRC error halts do NOT change the state of the System Status LED, and they do NOT get logged as SEL events. The following table lists all MRC fatal errors that are displayed to the Diagnostic LEDs. Table 61. MRC Fatal Error Codes Diagnostic LED Decoder 1 = LED On, 0 = LED Off Checkpoint Upper Nibble MSB Lower Nibble LSB Description 8h 4h 2h 1h 8h 4h 2h 1h #7 #6 #5 #4 #3 #2 #1 #0 LED MRC Fatal Error Codes E8h No usable memory error 01h = No memory was detected from SPD read, or invalid config that 1 1 1 0 1 0 0 0 causes no operable memory. 02h = Memory DIMMs on all channels of all sockets are disabled due to hardware memtest error. 3h = No memory installed. All channels are disabled. Revision 1.1 235 Intel order number G24881-004