Intel S2600GZ S2600GZ/GL - Page 86

This includes the EFI memory map and the Legacy E820 memory map depending on

Page 86 highlights

Intel® Server Board S2600GZ/GL TPS Platform Management Functional Overview methods, for the purpose of sending to an Intel engineer for an enhanced debugging capability. The files are compressed, encrypted, and password protected. The file is not meant to be viewable by the end user but rather to provide additional debugging capability to an Intel support engineer. A list of data that may be captured using this feature includes but is not limited to:  Platform sensor readings - This includes all "readable" sensors that can be accessed by the BMC FW and have associated SDRs populated in the SDR repository. This does not include any "event-only" sensors. (All BIOS sensors and some BMC and ME sensors are "event-only"; meaning that they are not readable using an IPMI Get Sensor Reading command but rather are used just for event logging purposes).  SEL - The current SEL contents are saved in both hexadecimal and text format.  CPU/memory register data - useful for diagnosing the cause of the following system errors: CATERR, ERR[2], SMI timeout, PERR, and SERR. The debug data is saved and timestamped for the last 3 occurrences of the error conditions. o PCI error registers o MSR registers o MCH registers  BMC configuration data o BMC FW debug log (that is, SysLog) - Captures FW debug messages. o Non-volatile storage of captured data. Some of the captured data will be stored persistently in the BMC's non-volatile flash memory and preserved across AC power cycles. Due to size limitations of the BMC's flash memory, it is not feasible to store all of the data persistently.  SMBIOS table data. The entire SMBIOS table is captured from the last boot.  PCI configuration data for on-board devices and add-in cards. The first 256 bytes of PCI configuration data is captured for each device for each boot.  System memory map. The system memory map is provided by BIOS on the current boot. This includes the EFI memory map and the Legacy (E820) memory map depending on the current boot.  Power supplies debug capability. o Capture of power supply "black box" data and power supply asset information. Power supply vendors are adding the capability to store debug data within the power supply itself. The platform debug feature provides a means to capture this data for each installed power supply. The data can be analyzed by Intel for failure analysis and possibly provided to the power supply vendor as well. The BMC gets this data from the power supplies from PMBus* manufacturer-specific commands. o Storage of system identification in power supply. The BMC copies board and system serial numbers and part numbers into the power supply whenever a new power supply is installed in the system or when the system is first powered on. This information is included as part of the power supply black box data for each installed power supply.  Accessibility from IPMI interfaces. The platform debug file can be accessed from an external IPMI interface (KCS or LAN).  POST code sequence for the two most recent boots. This is a best-effort data collection by the BMC as the BMC real-time response cannot guarantee that all POST codes are captured. Revision 1.1 73 Intel order number G24881-004

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Intel® Server Board S2600GZ/GL TPS
Platform Management Functional Overview
Revision 1.1
Intel order number G24881-004
73
methods, for the purpose of sending to an Intel engineer for an enhanced debugging capability.
The files are compressed, encrypted, and password protected. The file is not meant to be
viewable by the end user but rather to provide additional debugging capability to an Intel support
engineer.
A list of data that may be captured using this feature includes but is not limited to:
Platform sensor readings
This includes all “readable” sensors that can be accessed by
the BMC FW and have associated SDRs populated in the SDR repository. This does not
include any “event
-
only” sensors. (All BIOS sensors and some
BMC and ME sensors are
“event
-
only”; meaning that they are not readable using an IPMI Get Sensor Reading
command but rather are used just for event logging purposes).
SEL
The current SEL contents are saved in both hexadecimal and text format.
CPU/memory register data
useful for diagnosing the cause of the following system
errors: CATERR, ERR[2], SMI timeout, PERR, and SERR. The debug data is saved and
timestamped for the last 3 occurrences of the error conditions.
o
PCI error registers
o
MSR registers
o
MCH registers
BMC configuration data
o
BMC FW debug log (that is, SysLog)
Captures FW debug messages.
o
Non-volatile storage of captured data.
Some of the captured data will be stored
persistently in the BMC’s non
-volatile flash memory and preserved across AC
power cycles. Due to size limitations of the BMC’s flash memory, it is not feasible
to store all of the data persistently.
SMBIOS table data
. The entire SMBIOS table is captured from the last boot.
PCI configuration data for on-board devices and add-in cards
. The first 256 bytes of PCI
configuration data is captured for each device for each boot.
System memory map.
The system memory map is provided by BIOS on the current boot.
This includes the EFI memory map and the Legacy (E820) memory map depending on the
current boot.
Power supplies debug capability.
o
Capture of power supply “black box” data
and power supply asset information.
Power supply vendors are adding the capability to store debug data within the
power supply itself. The platform debug feature provides a means to capture this
data for each installed power supply. The data can be analyzed by Intel for failure
analysis and possibly provided to the power supply vendor as well. The BMC
gets this data from the power supplies from PMBus* manufacturer-specific
commands.
o
Storage of system identification in power supply.
The BMC copies board and
system serial numbers and part numbers into the power supply whenever a new
power supply is installed in the system or when the system is first powered on.
This information is included as part of the power supply black box data for each
installed power supply.
Accessibility from IPMI interfaces.
The platform debug file can be accessed from an
external IPMI interface (KCS or LAN).
POST code sequence for the two most recent boots
. This is a best-effort data collection by
the BMC as the BMC real-time response cannot guarantee that all POST codes are
captured.