Intel S2600GZ S2600GZ/GL - Page 35

Product Architecture Overview Intel® Server Board S2600GZ/GL TPS Figure 15. Intel® Server Board S2600GL Memory Slot Layout The following are generic DIMM population requirements that generally apply to both the Intel® Server Board S2600GZ and Intel® Server Board S2600GL.  All DIMMs must be DDR3 DIMMs  Unbuffered DIMMs can be ECC or non-ECC. However, Intel only validates and supports ECC memory for its server products.  Mixing of Registered and Unbuffered DIMMs is not allowed per platform.  Mixing of LRDIMM with any other DIMM type is not allowed per platform.  Mixing of DDR3 voltages is not validated within a socket or across sockets by Intel. If 1.35V (DDR3L) and 1.50V (DDR3) DIMMs are mixed, the DIMMs will run at 1.50V.  Mixing of DDR3 operating frequencies is not validated within a socket or across sockets by Intel. If DIMMs with different frequencies are mixed, all DIMMs will run at the common lowest frequency.  Quad rank RDIMMs are supported but not validated by Intel.  A maximum of 8 logical ranks (ranks seen by the host) per channel is allowed.  Mixing of ECC and non-ECC DIMMs is not allowed per platform.  DIMMs with different timing parameters can be installed on different slots within the same channel, but only timings that support the slowest DIMM will be applied to all. As a consequence, faster DIMMs will be operated at timings supported by the slowest DIMM populated.  When one DIMM is used, it must be populated in the BLUE DIMM slot (farthest away from the CPU) of a given channel.  When single, dual and quad rank DIMMs are populated for 2DPC or 3DPC, always populate the higher number rank DIMM first (starting from the farthest slot), for example, first quad rank, then dual rank, and last single rank DIMM. 22 Revision 1.1 Intel order number G24881-004