Intel S2600CP Technical Product Specification - Page 180

Intel® Server System P4000CP Power System Options Intel® Server Board S2600CP and Server System P4000CP TPS While in Stand-by mode, at no load condition, the residual voltage on each DC/DC converter output does not exceed 100mV. 13.4.3 Protection Circuits The PDB shall shut down all the DC/DC converters on the PDB and the power supply (by PSON) if there is a fault condition on the PDB (OVP or OCP). If the PDB DC/DC converter latches off due to a protection circuit tripping, an AC cycle OFF for 15sec min or a PSON# cycle HIGH for 1sec shall be able to reset the power supply and the PDB. 13.4.3.1 Over-Current Protection (OCP)/240VA Protection Each DC/DC converter output on PDB has individual OCP protection circuits. The PS+PDB combo shall shutdown and latch off after an over current condition occurs. This latch shall be cleared by toggling the PSON# signal or by an AC power interruption. The values are measured at the PDB harness connectors. The DC/DC converters shall not be damaged from repeated power cycling in this condition. Also, the +12V output from the power supply is divided on the PDB into 4 channels and +12V4 is limited to 240VA of power. There are current sensors and limit circuits to shut down the entire PS+PDB combo if the limit is exceeded. The limits are listed in below table. -12V and 5VSB is protected under over current or shorted conditions so that no damage can occur to the power supply. Auto-recovery feature is a requirement on 5VSB rail. Table 134. PDB Over Current Protection Limits/240VA Protection Output Voltage +3.3V +5V +12V1 +12V2 +12V3 Min OCP Trip Limits 27A 27A 91A 76A 18A Max OCP Trip Limits 32A 32A 100A 100A 20A Usage PCIe, Misc PCIe, HDD, Misc CPU1 + memory Fans, Misc HDD and peripherals Connectors P1, P5, P6 P1, P5, P6 P1-P3, P12 P13-P16 P5-P11 13.4.3.2 Over Voltage Protection (OVP) Each DC/DC converter output on PDB have individual OVP protection circuits built in and it shall be locally sensed. The PS+PDB combo shall shutdown and latch off after an over voltage condition occurs. This latch shall be cleared by toggling the PSON# signal or by an AC power interruption. Table 98 contains the over voltage limits. The values are measured at the PDB harness connectors. The voltage shall never exceed the maximum levels when measured at the power pins of the output harness connector during any single point of fail. The voltage shall never trip any lower than the minimum levels when measured at the power pins of the PDB connector. Table 135. Over Voltage Protection (OVP) Limits Output voltage +3.3V +5V -12V +5VSB OVP min (v) 3.9 5.7 -13.3 5.7 OVP max (v) 4.8 6.5 -15.5 6.5 164 Revision 1.2 Intel order number G26942-003