Intel S2600CP Technical Product Specification - Page 201

P1 Therm Ctrl, P2 Therm Ctrl, P3 Therm Ctrl, P4 Therm Ctrl

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Intel® Server Board S2600CP and Server System P4000CP TPS Appendix C: BMC Sensor Tables Full Sensor Name (Sensor name in SDR) Sensor Platform # Applicability Processor 1 Thermal Margin (P1 Therm Margin) 74h All Processor 2 Thermal Margin (P2 Therm Margin) 75h All Processor 3 Thermal Margin (P3 Therm Margin) 76h Platformspecific Processor 4 Thermal Margin (P4 Therm Margin) 77h Platformspecific Processor 1 Thermal Control % (P1 Therm Ctrl %) Processor 2 Thermal Control % (P2 Therm Ctrl %) Processor 3 Thermal Control % (P3 Therm Ctrl %) Processor 4 Thermal Control % (P4 Therm Ctrl %) 78h All 79h All 7Ah Platformspecific 7Bh Platformspecific Processor 1 ERR2 Timeout 7Ch All (P1 ERR2) Processor 2 ERR2 Timeout (P2 ERR2) 7Dh All Processor 3 ERR2 Timeout (P3 ERR2) 7Eh Platformspecific Sensor Type Temperature 01h Temperature 01h Temperature 01h Temperature 01h Temperature 01h Temperature 01h Temperature 01h Temperature 01h Processor 07h Processor 07h Processor 07h Event/Readi ng Type Threshold 01h Threshold 01h Threshold 01h Threshold 01h Threshold 01h Threshold 01h Threshold 01h Threshold 01h Digital Discrete 03h Digital Discrete 03h Digital Discrete 03h Event Offset Triggers [u] [c,nc] [u] [c,nc] [u] [c,nc] [u] [c,nc] 01 - State Asserted 01 - State Asserted 01 - State Asserted Contrib. To System Status Assert/ De- assert Readable Value/Of fsets - - Analog Event Data R, T - - Analog R, T - - Analog R, T - - Analog R, T nc = Degraded c = Non-fatal As and Analog Trig Offset De nc = Degraded c = Non-fatal As and Analog Trig Offset De nc = Degraded c = Non-fatal As and Analog Trig Offset De nc = Degraded c = Non-fatal As and Analog Trig Offset De As fatal and - Trig Offset De As fatal and - Trig Offset De As fatal and - Trig Offset De Rearm A A A A A A A A A A A Standby Revision 1.2 185 Intel order number G26942-003

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Intel
®
Server Board S2600CP and Server System P4000CP TPS
Appendix C: BMC Sensor Tables
Revision 1.2
Intel order number G26942-003
185
Full Sensor Name
(Sensor name in SDR)
Sensor
#
Platform
Applicability
Sensor Type
Event/Readi
ng Type
Event Offset Triggers
Contrib. To
System Status
Assert/
De-
assert
Readable
Value/Of
fsets
Event
Data
Rearm
Stand-
by
Processor 1 Thermal Margin
(P1 Therm Margin)
74h
All
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
–
Processor 2 Thermal Margin
(P2 Therm Margin)
75h
All
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
–
Processor 3 Thermal Margin
(P3 Therm Margin)
76h
Platform-
specific
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
–
Processor 4 Thermal Margin
(P4 Therm Margin)
77h
Platform-
specific
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
–
Processor 1 Thermal
Control %
(
P1 Therm Ctrl %
)
78h
All
Temperature
01h
Threshold
01h
[u] [c,nc]
nc =
Degraded
c = Non-fatal
As
and
De
Analog
Trig Offset
A
–
Processor 2 Thermal
Control %
(
P2 Therm Ctrl %
)
79h
All
Temperature
01h
Threshold
01h
[u] [c,nc]
nc =
Degraded
c = Non-fatal
As
and
De
Analog
Trig Offset
A
–
Processor 3 Thermal
Control %
(
P3 Therm Ctrl %
)
7Ah
Platform-
specific
Temperature
01h
Threshold
01h
[u] [c,nc]
nc =
Degraded
c = Non-fatal
As
and
De
Analog
Trig Offset
A
–
Processor 4 Thermal
Control %
(
P4 Therm Ctrl %
)
7Bh
Platform-
specific
Temperature
01h
Threshold
01h
[u] [c,nc]
nc =
Degraded
c = Non-fatal
As
and
De
Analog
Trig Offset
A
–
Processor 1 ERR2 Timeout
(P1 ERR2)
7Ch
All
Processor
07h
Digital
Discrete
03h
01 – State Asserted
fatal
As
and
De
–
Trig Offset
A
–
Processor 2 ERR2 Timeout
(P2 ERR2)
7Dh
All
Processor
07h
Digital
Discrete
03h
01 – State Asserted
fatal
As
and
De
–
Trig Offset
A
–
Processor 3 ERR2 Timeout
(P3 ERR2)
7Eh
Platform-
specific
Processor
07h
Digital
Discrete
03h
01 – State Asserted
fatal
As
and
De
–
Trig Offset
A
–