Intel S2600CP Technical Product Specification - Page 57

Intel® Server Board S2600CP and Server System P4000CP TPS Intel® Server Board S2600CP Functional Architecture using I/O space, and an AHCI mode using memory space. Software that uses legacy mode will not have AHCI capabilities. Note: When connecting the four SATA 3G ports to backplanes, the SATA SGPIO cable needs to be properly connected in order to enable the LED indicator for the drives. The two SATA 6G ports do not have SGPIO signal routed, the LED indicator will not light up if connecting the ports to backplane. The ports can be used for ODD devices. 4.3.4 Serial Attached SCSI (SAS)/SATA Controller On Intel® Server Board S2600CP2/S2600CP4, the C600 chipset supports up to 8 SAS ports support rates up to 3.0 Gb/s. Please refer to section "On-board SAS/SATA Support and Options" for detail information of the port features with C600 upgrade keys. The feature is not available on Intel® Server Board S2600CP2J 4.3.5 AHCI The C600 chipset provides hardware support for Advanced Host Controller Interface (AHCI), a standardized programming interface for SATA host controllers. Platforms supporting AHCI may take advantage of performance features. AHCI also provides usability enhancements such as Hot-Plug. AHCI requires appropriate software support (for example, an AHCI driver) and for some features, hardware support in the SATA device or additional platform hardware. 4.3.6 PCI Interface The C600 chipset PCI interface provides a 33 MHz, Revision 2.3 implementation. The C600 chipset integrates a PCI arbiter that supports up to four external PCI bus masters in addition to the internal C600 chipset requests. This allows for combinations of up to four PCI down devices and PCI slots. 4.3.7 Low Pin Count (LPC) Interface The C600 chipset implements an LPC Interface as described in the LPC 1.1 Specification. The Low Pin Count (LPC) bridge function of the C600 resides in PCI Device 31: Function 0. In addition to the LPC bridge interface function, D31:F0 contains other functional units including DMA, interrupt controllers, timers, power management, system management, GPIO, and RTC. 4.3.8 Serial Peripheral Interface (SPI) The C600 chipset implements an SPI Interface as an alternative interface for the BIOS flash device. The SPI flash is required to support Gigabit Ethernet and Intel® Active Management Technology. The C600 chipset supports up to two SPI flash devices with speeds up to 50 MHz. 4.3.9 Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller) The DMA controller incorporates the logic of two 82C37 DMA controllers, with seven independently programmable channels. The C600 chipset supports LPC DMA through the C600 chipset's DMA controller. The timer/counter block contains three counters that are equivalent in function to those found in one 82C54 programmable interval timer. These three counters are combined to provide the system timer function, and speaker tone. Revision 1.2 41 Intel order number G26942-003