Intel S2600CP Technical Product Specification - Page 202

CATERR, P1 MSID Mismatch, CPU Missing, P2 MSID Mismatch, P1 VRD Hot, P2 VRD Hot

Page 202 highlights

Appendix C: BMC Sensor Tables Intel® Server Board S2600CP and Server System P4000CP TPS Full Sensor Name (Sensor name in SDR) Sensor Platform # Applicability Processor 4 ERR2 Timeout (P4 ERR2) 7Fh Platformspecific Catastrophic Error (CATERR) 80h All Processor1 MSID Mismatch 81h All (P1 MSID Mismatch) Processor Population Fault 82h All (CPU Missing) Processor 1 DTS Thermal Margin 83h All (P1 DTS Therm Mgn) Processor 2 DTS Thermal Margin 84h All (P2 DTS Therm Mgn) Processor 3 DTS Thermal Margin 85h All (P3 DTS Therm Mgn) Processor 4 DTS Thermal Margin 86h All (P4 DTS Therm Mgn) Processor2 MSID Mismatch 87h All (P2 MSID Mismatch) Processor 1 VRD Temperature (P1 VRD Hot) Processor 2 VRD Temperature (P2 VRD Hot) 90h All 91h All Sensor Type Processor 07h Processor 07h Processor 07h Processor 07h Temperature 01h Temperature 01h Temperature 01h Temperature 01h Processor 07h Temperature 01h Temperature 01h Event/Readi Event Offset Triggers ng Type Digital Discrete 03h Digital Discrete 03h Digital Discrete 03h Digital Discrete 03h Threshold 01h Threshold 01h Threshold 01h Threshold 01h Digital Discrete 03h Digital Discrete 05h Digital Discrete 05h 01 - State Asserted 01 - State Asserted 01 - State Asserted 01 - State Asserted 01 - State Asserted 01 - Limit exceeded 01 - Limit exceeded Contrib. To System Status fatal fatal fatal Fatal Assert/ De- assert As and De Readable Value/Of fsets - As and - De As and - De As and - De Event Data Trig Offset Trig Offset Trig Offset Trig Offset - - Analog R, T - - Analog R, T - - Analog R, T fatal Non-fatal Non-fatal - Analog R, T As and - Trig Offset De As and - Trig Offset De As and - Trig Offset De Rearm A M M M A A A A M M M Standby 186 Revision 1.2 Intel order number G26942-003

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Appendix C: BMC Sensor Tables
Intel
®
Server Board S2600CP and Server System P4000CP TPS
Revision 1.2
Intel order number G26942-003
186
Full Sensor Name
(Sensor name in SDR)
Sensor
#
Platform
Applicability
Sensor Type
Event/Readi
ng Type
Event Offset Triggers
Contrib. To
System Status
Assert/
De-
assert
Readable
Value/Of
fsets
Event
Data
Rearm
Stand-
by
Processor 4 ERR2 Timeout
(P4 ERR2)
7Fh
Platform-
specific
Processor
07h
Digital
Discrete
03h
01 – State Asserted
fatal
As
and
De
Trig Offset
A
Catastrophic Error
(CATERR)
80h
All
Processor
07h
Digital
Discrete
03h
01 – State Asserted
fatal
As
and
De
Trig Offset
M
Processor1 MSID Mismatch
(P1 MSID Mismatch)
81h
All
Processor
07h
Digital
Discrete
03h
01 – State Asserted
fatal
As
and
De
Trig Offset
M
Processor Population Fault
(CPU Missing)
82h
All
Processor
07h
Digital
Discrete
03h
01 – State Asserted
Fatal
As
and
De
Trig Offset
M
Processor 1 DTS Thermal
Margin
(P1 DTS Therm Mgn)
83h
All
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
Processor 2 DTS Thermal
Margin
(P2 DTS Therm Mgn)
84h
All
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
Processor 3 DTS Thermal
Margin
(P3 DTS Therm Mgn)
85h
All
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
Processor 4 DTS Thermal
Margin
(P4 DTS Therm Mgn)
86h
All
Temperature
01h
Threshold
01h
-
-
-
Analog
R, T
A
Processor2 MSID Mismatch
(P2 MSID Mismatch)
87h
All
Processor
07h
Digital
Discrete
03h
01 – State Asserted
fatal
As
and
De
Trig Offset
M
Processor 1 VRD
Temperature
(
P1 VRD Hot
)
90h
All
Temperature
01h
Digital
Discrete
05h
01 - Limit exceeded
Non-fatal
As
and
De
Trig Offset
M
Processor 2 VRD
Temperature
(
P2 VRD Hot
)
91h
All
Temperature
01h
Digital
Discrete
05h
01 - Limit exceeded
Non-fatal
As
and
De
Trig Offset
M