Intel S2600CP Technical Product Specification - Page 58

Intel® Server Board S2600CP Functional Architecture Intel® Server Board S2600CP and Server System P4000CP TPS The C600 chipset provides an ISA-Compatible Programmable Interrupt Controller (PIC) that incorporates the functionality of two 82C59 interrupt controllers. In addition, the C600 chipset supports a serial interrupt scheme. All of the registers in these modules can be read and restored. This is required to save and restore system state after power has been removed and restored to the platform. 4.3.10 Advanced Programmable Interrupt Controller (APIC) In addition to the standard ISA compatible Programmable Interrupt controller (PIC) described in the previous section, the C600 incorporates the Advanced Programmable Interrupt Controller (APIC). 4.3.11 Universal Serial Bus (USB) Controllers The C600 chipset has up to two Enhanced Host Controller Interface (EHCI) host controllers that support USB high-speed signaling. High-speed USB 2.0 allows data transfers up to 480 Mb/s which is 40 times faster than full-speed USB. The C600 chipset supports up to fourteen USB 2.0 ports. All fourteen ports are high-speed, full-speed, and low-speed capable. 4.3.12 Gigabit Ethernet Controller The Gigabit Ethernet Controller provides a system interface using a PCI function. The controller provides a full memory-mapped or IO mapped interface along with a 64 bit address master support for systems using more than 4 GB of physical memory and DMA (Direct Memory Addressing) mechanisms for high performance data transfers. Its bus master capabilities enable the component to process high-level commands and perform multiple operations; this lowers processor utilization by off-loading communication tasks from the processor. Two large configurable transmit and receive FIFOs (up to 20 KB each) help prevent data underruns and overruns while waiting for bus accesses. This enables the integrated LAN controller to transmit data with minimum inter-frame spacing (IFS). The LAN controller can operate at multiple speeds (10/100/1000 MB/s) and in either full duplex or half duplex mode. In full duplex mode the LAN controller adheres with the IEEE 802.3x Flow Control Specification. Half duplex performance is enhanced by a proprietary collision reduction mechanism. 4.3.13 RTC The C600 chipset contains a real-time clock with 256 bytes of battery-backed RAM. The realtime clock performs two key functions: keeping track of the time of day and storing system data. The RTC operates on a 32.768 KHz crystal and a 3 V battery. 4.3.14 GPIO Various general purpose inputs and outputs are provided for custom system design. The number of inputs and outputs varies depending on the C600 chipset configuration. 4.3.15 Enhanced Power Management The C600 chipset's power management functions include enhanced clock control and various low-power (suspend) states. A hardware-based thermal management circuit permits softwareindependent entrance to low-power states. The C600 chipset contains full support for the Advanced Configuration and Power Interface (ACPI) Specification, Revision 4.0a. 42 Revision 1.2 Intel order number G26942-003